244 lines
3.1 KiB
C
244 lines
3.1 KiB
C
#include "u.h"
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#include "../port/lib.h"
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#include "mem.h"
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#include "dat.h"
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#include "fns.h"
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#include "io.h"
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enum {
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CTRL = 0,
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MODE,
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IRQEN,
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IRQDIS,
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MASK,
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INTSTAT,
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RXFIFOLVL = 0x20/4,
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CHANSTAT = 0x2C/4,
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FIFO = 0x30/4,
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};
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enum {
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TXFULL = 1<<4,
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TXEMPTY = 1<<3,
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RXEMPTY = 1<<1,
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RXTRIG = 1<<0,
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};
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typedef struct Ctlr {
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Lock;
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ulong *r;
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int irq, iena;
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} Ctlr;
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Uart* uartenable(Uart *);
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extern PhysUart zynqphysuart;
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static Ctlr zctlr[1] = {
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{
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.r = (void *) VMAP,
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.irq = UART1IRQ,
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}
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};
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static Uart zuart[1] = {
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{
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.regs = &zctlr[0],
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.name = "UART1",
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.freq = 25000000,
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.phys = &zynqphysuart,
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.console = 1,
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.baud = 115200,
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}
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};
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void
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uartinit(void)
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{
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consuart = zuart;
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}
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static Uart *
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zuartpnp(void)
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{
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return zuart;
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}
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static void
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zuartkick(Uart *uart)
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{
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Ctlr *ct;
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int i;
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if(uart->blocked)
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return;
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ct = uart->regs;
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for(i = 0; i < 128; i++){
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if((ct->r[CHANSTAT] & TXFULL) != 0)
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break;
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if(uart->op >= uart->oe && uartstageoutput(uart) == 0)
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break;
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ct->r[FIFO] = *uart->op++;
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}
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}
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static void
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zuartintr(Ureg *, void *arg)
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{
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Uart *uart;
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Ctlr *ct;
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int c;
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ulong fl;
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uart = arg;
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ct = uart->regs;
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fl = ct->r[INTSTAT] & ct->r[MASK];
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ct->r[INTSTAT] = fl;
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if((fl & RXTRIG) != 0)
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while((ct->r[CHANSTAT] & RXEMPTY) == 0){
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c = ct->r[FIFO];
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uartrecv(uart, c);
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}
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if((fl & TXEMPTY) != 0)
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zuartkick(uart);
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}
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static void
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zuartenable(Uart *uart, int ie)
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{
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Ctlr *ctlr;
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ctlr = uart->regs;
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ilock(ctlr);
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while((ctlr->r[CHANSTAT] & TXEMPTY) == 0)
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;
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ctlr->r[IRQDIS] = -1;
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ctlr->r[RXFIFOLVL] = 1;
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if(ie){
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if(!ctlr->iena){
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intrenable(ctlr->irq, zuartintr, uart, LEVEL, uart->name);
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ctlr->iena = 1;
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}
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ctlr->r[IRQEN] = RXTRIG | TXEMPTY;
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}
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iunlock(ctlr);
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}
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static int
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zuartgetc(Uart *uart)
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{
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Ctlr *c;
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c = uart->regs;
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while((c->r[CHANSTAT] & RXEMPTY) != 0)
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;
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return c->r[FIFO];
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}
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static void
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zuartputc(Uart *uart, int c)
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{
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Ctlr *ct;
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ct = uart->regs;
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while((ct->r[CHANSTAT] & TXFULL) != 0)
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;
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ct->r[FIFO] = c;
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return;
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}
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int
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uartconsole(void)
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{
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Uart *uart = zuart;
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if(up == nil)
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return -1;
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if(uartenable(uart) != nil){
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serialoq = uart->oq;
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uart->opens++;
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consuart = uart;
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}
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return 0;
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}
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int
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zuartbits(Uart *uart, int n)
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{
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Ctlr *ct;
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ct = uart->regs;
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ct->r[MODE] &= ~6;
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switch(n){
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case 8:
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return 0;
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case 7:
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ct->r[MODE] |= 4;
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return 0;
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case 6:
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ct->r[MODE] |= 6;
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return 0;
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default:
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return -1;
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}
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}
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int
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zuartbaud(Uart *, int n)
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{
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print("uart baud %d\n", n);
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return 0;
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}
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int
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zuartparity(Uart *uart, int p)
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{
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Ctlr *ct;
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ct = uart->regs;
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switch(p){
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case 'o':
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ct->r[MODE] = ct->r[MODE] & ~0x38 | 0x08;
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return 0;
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case 'e':
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ct->r[MODE] = ct->r[MODE] & ~0x38;
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return 0;
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case 'n':
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ct->r[MODE] = ct->r[MODE] & 0x38 | 0x20;
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return 0;
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default:
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return -1;
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}
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}
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void
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zuartnop(Uart *, int)
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{
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}
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int
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zuartnope(Uart *, int)
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{
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return -1;
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}
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PhysUart zynqphysuart = {
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.pnp = zuartpnp,
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.enable = zuartenable,
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.kick = zuartkick,
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.getc = zuartgetc,
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.putc = zuartputc,
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.bits = zuartbits,
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.baud = zuartbaud,
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.parity = zuartparity,
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.stop = zuartnope,
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.rts = zuartnop,
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.dtr = zuartnop,
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.dobreak = zuartnop,
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.fifo = zuartnop,
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.power = zuartnop,
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.modemctl = zuartnop,
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};
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