24057fd4f4
introducing the PFPU structue which allows the machine specific code some flexibility on how to handle the FPU process state. for example, in the pc and pc64 kernel, the FPsave structure is arround 512 bytes. with avx512, it could grow up to 2K. instead of embedding that into the Proc strucutre, it is more effective to allocate it on first use of the fpu, as most processes do not use simd or floating point in the first place. also, the FPsave structure has special 16 byte alignment constraint, which further favours dynamic allocation. this gets rid of the memmoves in pc/pc64 kernels for the aligment. there is also devproc, which is now checking if the fpsave area is actually valid before reading it, avoiding debuggers to see garbage data. the Notsave structure is gone now, as it was not used on any machine.
318 lines
5.5 KiB
C
318 lines
5.5 KiB
C
typedef struct Conf Conf;
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typedef struct Confmem Confmem;
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typedef struct FPsave FPsave;
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typedef struct PFPU PFPU;
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typedef struct ISAConf ISAConf;
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typedef struct Label Label;
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typedef struct Lock Lock;
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typedef struct Memcache Memcache;
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typedef struct MMMU MMMU;
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typedef struct Mach Mach;
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typedef struct Page Page;
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typedef struct Pcidev Pcidev;
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typedef struct PhysUart PhysUart;
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typedef struct PMMU PMMU;
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typedef struct Proc Proc;
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typedef u32int PTE;
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typedef struct Soc Soc;
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typedef struct Uart Uart;
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typedef struct Ureg Ureg;
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typedef uvlong Tval;
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#pragma incomplete Pcidev
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#pragma incomplete Ureg
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#define MAXSYSARG 5 /* for mount(fd, mpt, flag, arg, srv) */
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/*
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* parameters for sysproc.c
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*/
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#define AOUT_MAGIC (E_MAGIC)
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struct Lock
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{
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ulong key;
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u32int sr;
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uintptr pc;
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Proc* p;
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Mach* m;
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int isilock;
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};
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struct Label
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{
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uintptr sp;
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uintptr pc;
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};
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/*
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* emulated floating point
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*/
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enum{
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Nfpctlregs = 16,
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};
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struct FPsave
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{
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ulong status;
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ulong control;
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ulong regs[Nfpctlregs][3];
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int fpstate;
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};
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struct PFPU
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{
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int fpstate;
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FPsave fpsave[1];
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};
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enum
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{
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FPinit,
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FPactive,
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FPinactive,
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};
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struct Confmem
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{
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uintptr base;
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usize npage;
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uintptr limit;
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uintptr kbase;
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uintptr klimit;
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};
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struct Conf
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{
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ulong nmach; /* processors */
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ulong nproc; /* processes */
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ulong monitor; /* has monitor? */
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Confmem mem[1]; /* physical memory */
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ulong npage; /* total physical pages of memory */
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usize upages; /* user page pool */
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ulong copymode; /* 0 is copy on write, 1 is copy on reference */
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ulong ialloc; /* max interrupt time allocation in bytes */
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ulong pipeqsize; /* size in bytes of pipe queues */
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ulong nimage; /* number of page cache image headers */
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ulong nswap; /* number of swap pages */
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int nswppo; /* max # of pageouts per segment pass */
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// ulong hz; /* processor cycle freq */
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// ulong mhz;
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};
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/*
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* MMU stuff in Mach.
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*/
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struct MMMU
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{
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PTE* mmul1; /* l1 for this processor */
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int mmul1lo;
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int mmul1hi;
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int mmupid;
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};
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/*
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* MMU stuff in proc
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*/
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#define NCOLOR 1 /* 1 level cache, don't worry about VCE's */
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struct PMMU
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{
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Page* mmul2;
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Page* mmul2cache; /* free mmu pages */
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};
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#include "../port/portdat.h"
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struct Mach
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{
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int machno; /* physical id of processor */
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uintptr splpc; /* pc of last caller to splhi */
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Proc* proc; /* current process */
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MMMU;
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int flushmmu; /* flush current proc mmu state */
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ulong ticks; /* of the clock since boot time */
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Label sched; /* scheduler wakeup */
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Lock alarmlock; /* access to alarm list */
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void* alarm; /* alarms bound to this clock */
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int inclockintr;
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Proc* readied; /* for runproc */
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ulong schedticks; /* next forced context switch */
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int cputype;
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int socrev; /* system-on-chip revision */
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ulong delayloop;
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/* stats */
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int tlbfault;
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int tlbpurge;
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int pfault;
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int cs;
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int syscall;
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int load;
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int intr;
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vlong fastclock; /* last sampled value */
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uvlong inidle; /* time spent in idlehands() */
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ulong spuriousintr;
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int lastintr;
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int ilockdepth;
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Perf perf; /* performance counters */
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// int cpumhz;
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uvlong cpuhz; /* speed of cpu */
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uvlong cyclefreq; /* Frequency of user readable cycle counter */
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/* save areas for exceptions */
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u32int sfiq[5];
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u32int sirq[5];
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u32int sund[5];
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u32int sabt[5];
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#define fiqstack sfiq
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#define irqstack sirq
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#define abtstack sabt
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#define undstack sund
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int stack[1];
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};
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/*
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* Fake kmap.
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*/
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typedef void KMap;
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#define VA(k) ((uintptr)(k))
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#define kmap(p) (KMap*)((p)->pa|kseg0)
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#define kunmap(k)
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struct
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{
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char machs[MAXMACH]; /* active CPUs */
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int exiting; /* shutdown */
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}active;
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enum {
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Frequency = 1200*1000*1000, /* the processor clock */
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};
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extern register Mach* m; /* R10 */
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extern register Proc* up; /* R9 */
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extern uintptr kseg0;
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extern Mach* machaddr[MAXMACH];
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enum {
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Nvec = 8, /* # of vectors at start of lexception.s */
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};
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/*
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* Layout of physical 0.
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*/
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typedef struct Vectorpage {
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void (*vectors[Nvec])(void);
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uint vtable[Nvec];
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} Vectorpage;
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/*
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* a parsed plan9.ini line
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*/
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#define NISAOPT 8
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struct ISAConf {
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char *type;
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ulong port;
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int irq;
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ulong dma;
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ulong mem;
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ulong size;
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ulong freq;
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int nopt;
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char *opt[NISAOPT];
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};
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#define MACHP(n) (machaddr[n])
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/*
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* Horrid. But the alternative is 'defined'.
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*/
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#ifdef _DBGC_
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#define DBGFLG (dbgflg[_DBGC_])
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#else
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#define DBGFLG (0)
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#endif /* _DBGC_ */
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int vflag;
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extern char dbgflg[256];
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#define dbgprint print /* for now */
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/*
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* hardware info about a device
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*/
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typedef struct {
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ulong port;
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int size;
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} Devport;
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struct DevConf
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{
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ulong intnum; /* interrupt number */
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char *type; /* card type, malloced */
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int nports; /* Number of ports */
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Devport *ports; /* The ports themselves */
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};
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enum {
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Dcache,
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Icache,
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Unified,
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};
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/* characteristics of a given cache level */
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struct Memcache {
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uint level; /* 1 is nearest processor, 2 further away */
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uint kind; /* I, D or unified */
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uint size;
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uint nways; /* associativity */
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uint nsets;
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uint linelen; /* bytes per cache line */
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uint setsways;
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uint log2linelen;
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uint waysh; /* shifts for set/way register */
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uint setsh;
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};
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struct Soc { /* addr's of SoC controllers */
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uintptr cpu;
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uintptr devid;
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uintptr l2cache;
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uintptr sdramc;
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// uintptr sdramd; /* unused */
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uintptr iocfg;
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uintptr addrmap;
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uintptr intr;
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uintptr nand;
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uintptr cesa; /* crypto accel. */
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uintptr ehci;
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uintptr spi;
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uintptr twsi;
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uintptr analog;
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uintptr pci;
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uintptr pcibase;
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uintptr rtc; /* real-time clock */
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uintptr clock;
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uintptr ether[2];
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uintptr sata[3];
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uintptr uart[2];
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uintptr gpio[2];
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} soc;
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extern Soc soc;
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