995379e388
the following hooks have been added to the ehci Ctlr structore to handle cache coherency (on arm): void* (*tdalloc)(ulong,int,ulong); void* (*dmaalloc)(ulong); void (*dmafree)(void*); void (*dmaflush)(int,void*,ulong); tdalloc() is used to allocate descriptors and the periodic frame schedule array. on arm, this needs to return uncached memory. tdalloc()ed memory is never freed. dmaalloc()/dmafree() is used for io buffers. this can return cached memory when when hardware maintains cache coherency (pc) or dmaflush() is provided to flush/invalidate the cache (zynq), otherwise needs to return uncached memory. dmaflush() is used to flush/invalidate the cache. the first argument tells us if we need to flush (non zero) or invalidate (zero). uncached.h is gone now. this change makes the handling explicit.
160 lines
4.3 KiB
C
160 lines
4.3 KiB
C
/* override default macros from ../port/usb.h */
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#undef dprint
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#undef ddprint
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#undef deprint
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#undef ddeprint
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#define dprint if(ehcidebug)print
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#define ddprint if(ehcidebug>1)print
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#define deprint if(ehcidebug || ep->debug)print
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#define ddeprint if(ehcidebug>1 || ep->debug>1)print
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enum {
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/* typed links */
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Lterm = 1,
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Litd = 0<<1,
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Lqh = 1<<1,
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Lsitd = 2<<1,
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Lfstn = 3<<1, /* we don't use these */
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/* Cmd reg. */
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Cstop = 0x00000, /* stop running */
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Crun = 0x00001, /* start operation */
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Chcreset = 0x00002, /* host controller reset */
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Cflsmask = 0x0000C, /* frame list size bits */
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Cfls1024 = 0x00000, /* frame list size 1024 */
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Cfls512 = 0x00004, /* frame list size 512 frames */
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Cfls256 = 0x00008, /* frame list size 256 frames */
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Cpse = 0x00010, /* periodic sched. enable */
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Case = 0x00020, /* async sched. enable */
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Ciasync = 0x00040, /* interrupt on async advance doorbell */
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Citc1 = 0x10000, /* interrupt threshold ctl. 1 µframe */
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Citc4 = 0x40000, /* same. 2 µframes */
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/* ... */
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Citc8 = 0x80000, /* same. 8 µframes (can go up to 64) */
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/* Sts reg. */
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Sasyncss = 0x08000, /* aync schedule status */
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Speriodss = 0x04000, /* periodic schedule status */
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Srecl = 0x02000, /* reclamnation (empty async sched.) */
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Shalted = 0x01000, /* h.c. is halted */
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Sasync = 0x00020, /* interrupt on async advance */
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Sherr = 0x00010, /* host system error */
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Sfrroll = 0x00008, /* frame list roll over */
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Sportchg = 0x00004, /* port change detect */
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Serrintr = 0x00002, /* error interrupt */
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Sintr = 0x00001, /* interrupt */
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Sintrs = 0x0003F, /* interrupts status */
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/* Portsc reg. */
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Pspresent = 0x00000001, /* device present */
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Psstatuschg = 0x00000002, /* Pspresent changed */
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Psenable = 0x00000004, /* device enabled */
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Pschange = 0x00000008, /* Psenable changed */
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Psresume = 0x00000040, /* resume detected */
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Pssuspend = 0x00000080, /* port suspended */
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Psreset = 0x00000100, /* port reset */
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Pspower = 0x00001000, /* port power on */
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/* Intr reg. */
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Iusb = 0x01, /* intr. on usb */
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Ierr = 0x02, /* intr. on usb error */
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Iportchg = 0x04, /* intr. on port change */
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Ifrroll = 0x08, /* intr. on frlist roll over */
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Ihcerr = 0x10, /* intr. on host error */
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Iasync = 0x20, /* intr. on async advance enable */
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Iall = 0x3F, /* all interrupts */
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Callmine = 1,
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/* hack to disable port handoff */
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Psowner = 0,
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Pslinemask = 0,
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Pslow = -1
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};
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typedef struct Ctlr Ctlr;
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typedef void Ecapio;
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typedef struct Eopio Eopio;
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typedef struct Isoio Isoio;
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typedef struct Poll Poll;
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typedef struct Qh Qh;
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typedef struct Qtree Qtree;
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#pragma incomplete Ctlr
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struct Eopio
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{
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/*140*/ ulong cmd;
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/*144*/ ulong sts;
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/*148*/ ulong intr;
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/*14c*/ ulong frno;
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/*150*/ ulong reserved1;
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/*154*/ ulong frbase;
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/*158*/ ulong link;
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/*15c*/ ulong _ttctrl;
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/*160*/ ulong _burstsize;
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/*164*/ ulong _txfilltuning;
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/*168*/ ulong _txttfilltuning;
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/*16c*/ ulong _ic_usb;
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/*170*/ ulong _ulpi_viewport;
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/*174*/ ulong reserved2;
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/*178*/ ulong _endptnak;
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/*17c*/ ulong _endptnaken;
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/*180*/ ulong config;
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/*184*/ ulong portsc[1];
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};
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struct Poll
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{
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Lock;
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Rendez;
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int must;
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int does;
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};
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struct Ctlr
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{
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Rendez; /* for waiting to async advance doorbell */
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Lock; /* for ilock. qh lists and basic ctlr I/O */
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QLock portlck; /* for port resets/enable... (and doorbell) */
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int active; /* in use or not */
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void* capio; /* base address for debug info */
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Eopio* opio; /* Operational i/o regs */
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void* (*tdalloc)(ulong,int,ulong);
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void* (*dmaalloc)(ulong);
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void (*dmafree)(void*);
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void (*dmaflush)(int,void*,ulong len);
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int nframes; /* 1024, 512, or 256 frames in the list */
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ulong* frames; /* periodic frame list (hw) */
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Qh* qhs; /* async Qh circular list for bulk/ctl */
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Qtree* tree; /* tree of Qhs for the periodic list */
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int ntree; /* number of dummy qhs in tree */
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Qh* intrqhs; /* list of (not dummy) qhs in tree */
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Isoio* iso; /* list of active Iso I/O */
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ulong load;
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ulong isoload;
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int nintr; /* number of interrupts attended */
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int ntdintr; /* number of intrs. with something to do */
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int nqhintr; /* number of async td intrs. */
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int nisointr; /* number of periodic td intrs. */
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int nreqs;
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Poll poll;
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ulong base;
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int irq;
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ulong* r;
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};
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extern int ehcidebug;
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void ehcilinkage(Hci *hp);
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void ehcimeminit(Ctlr *ctlr);
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void ehcirun(Ctlr *ctlr, int on);
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