364 lines
5.8 KiB
C
364 lines
5.8 KiB
C
/*
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* realtek rtl8150 10/100 usb ethernet device driver
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*
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* copy-pasted from shingo watanabe's openbsd url(4) driver
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* and bill paul's and shunsuke akiyama's freebsd rue(4) driver
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*/
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#include <u.h>
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#include <libc.h>
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#include <thread.h>
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#include "usb.h"
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#include "dat.h"
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enum {
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Timeout = 50,
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Mfl = 60, /* min frame len */
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};
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enum { /* requests */
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Rqm = 0x05, /* request mem */
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Crm = 1, /* command read mem */
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Cwm = 2, /* command write mem */
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};
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enum { /* registers */
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Idr0 = 0x120, /* ether addr, load from 93c46 */
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Idr1 = 0x121,
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Idr2 = 0x122,
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Idr3 = 0x123,
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Idr4 = 0x124,
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Idr5 = 0x125,
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Mar0 = 0x126, /* multicast addr */
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Mar1 = 0x127,
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Mar2 = 0x128,
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Mar3 = 0x129,
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Mar4 = 0x12a,
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Mar5 = 0x12b,
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Mar6 = 0x12c,
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Mar7 = 0x12d,
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Cr = 0x12e, /* command */
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Tcr = 0x12f, /* transmit control */
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Rcr = 0x130, /* receive configuration */
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Tsr = 0x132,
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Rsr = 0x133,
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Con0 = 0x135,
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Con1 = 0x136,
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Msr = 0x137, /* media status */
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Phyar = 0x138, /* mii phy addr select */
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Phydr = 0x139, /* mii phy data */
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Phycr = 0x13b, /* mii phy control */
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Gppc = 0x13d,
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Wcr = 0x13e, /* wake count */
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Bmcr = 0x140, /* basic mode control */
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Bmsr = 0x142, /* basic mode status */
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Anar = 0x144, /* an advertisement */
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Anlp = 0x146, /* an link partner ability */
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Aner = 0x148,
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Nwtr = 0x14a, /* nway test */
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Cscr = 0x14c,
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Crc0 = 0x14e,
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Crc1 = 0x150,
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Crc2 = 0x152,
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Crc3 = 0x154,
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Crc4 = 0x156,
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Bm0 = 0x158, /* byte mask */
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Bm1 = 0x160,
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Bm2 = 0x168,
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Bm3 = 0x170,
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Bm4 = 0x178,
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Phy1 = 0x180,
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Phy2 = 0x184,
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Tw1 = 0x186
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};
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enum { /* Cr */
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We = 1 << 5, /* eeprom write enable */
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Sr = 1 << 4, /* software reset */
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Re = 1 << 3, /* ethernet receive enable */
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Te = 1 << 2, /* ethernet transmit enable */
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Ep3ce = 1 << 1, /* enable clr of perf counter */
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Al = 1 << 0 /* auto-load contents of 93c46 */
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};
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enum { /* Tcr */
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Tr1 = 1 << 7, /* tx retry count */
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Tr0 = 1 << 6,
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Ifg1 = 1 << 4, /* interframe gap time */
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Ifg0 = 1 << 3,
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Nocrc = 1 << 0 /* no crc appended */
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};
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enum { /* Rcr */
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Tail = 1 << 7,
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Aer = 1 << 6,
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Ar = 1 << 5,
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Am = 1 << 4,
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Ab = 1 << 3,
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Ad = 1 << 2,
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Aam = 1 << 1,
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Aap = 1 << 0
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};
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enum { /* Msr */
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Tfce = 1 << 7,
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Rfce = 1 << 6,
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Mdx = 1 << 4, /* duplex */
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S100 = 1 << 3, /* speed 100 */
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Lnk = 1 << 2,
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Tpf = 1 << 1,
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Rpf = 1 << 0
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};
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enum { /* Phyar */
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Phyamsk = 0x1f
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};
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enum { /* Phycr */
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Phyown = 1 << 6, /* own bit */
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Rwcr = 1 << 5, /* mii mgmt data r/w control */
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Phyoffmsk = 0x1f /* phy register offset */
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};
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enum { /* Bmcr */
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Spd = 0x2000, /* speed set */
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Bdx = 0x0100 /* duplex */
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};
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enum { /* Anar */
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Ap = 0x0400 /* pause */
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};
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enum { /* Anlp */
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Lpp = 0x0400 /* pause */
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};
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enum { /* eeprom address declarations */
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Ebase = 0x1200,
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Eidr0 = Ebase + 0x02,
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Eidr1 = Ebase + 0x03,
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Eidr2 = Ebase + 0x03,
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Eidr3 = Ebase + 0x03,
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Eidr4 = Ebase + 0x03,
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Eidr5 = Ebase + 0x03,
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Eint = Ebase + 0x17 /* interval */
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};
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enum { /* receive header */
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Bcm = 0x0fff, /* rx bytes count mask */
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Vpm = 0x1000, /* valid packet mask */
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Rpm = 0x2000, /* runt packet mask */
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Ppm = 0x4000, /* physical match packet mask */
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Mpm = 0x8000 /* multicast packet mask */
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};
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static int mem(Dev *, int, int, uchar *, int);
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static int csr8r(Dev *, int);
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static int csr16r(Dev *, int);
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static int csr8w(Dev *, int, int);
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static int csr16w(Dev *, int, int);
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static int csr32w(Dev *, int, int);
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static void reset(Dev *);
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int urlinit(Dev *);
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static int
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mem(Dev *d, int cmd, int off, uchar *buf, int len)
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{
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int r, rc;
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if(d == nil)
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return 0;
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r = Rvendor | Rdev;
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if(cmd == Crm)
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r |= Rd2h;
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else
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r |= Rh2d;
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rc = usbcmd(d, r, Rqm, off, 0, buf, len);
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if(rc < 0) {
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fprint(2, "%s: mem(%d, %#.4x) failed\n",
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argv0, cmd, off);
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}
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return rc;
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}
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static int
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csr8r(Dev *d, int reg)
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{
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uchar v;
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v = 0;
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if(mem(d, Crm, reg, &v, sizeof v) < 0)
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return 0;
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return v;
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}
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static int
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csr16r(Dev *d, int reg)
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{
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uchar v[2];
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PUT2(v, 0);
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if(mem(d, Crm, reg, v, sizeof v) < 0)
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return 0;
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return GET2(v);
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}
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static int
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csr8w(Dev *d, int reg, int val)
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{
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uchar v;
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v = val;
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if(mem(d, Cwm, reg, &v, sizeof v) < 0)
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return -1;
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return 0;
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}
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static int
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csr16w(Dev *d, int reg, int val)
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{
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uchar v[2];
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PUT2(v, val);
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if(mem(d, Cwm, reg, v, sizeof v) < 0)
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return -1;
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return 0;
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}
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static int
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csr32w(Dev *d, int reg, int val)
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{
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uchar v[4];
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PUT4(v, val);
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if(mem(d, Cwm, reg, v, sizeof v) < 0)
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return -1;
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return 0;
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}
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static void
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reset(Dev *d)
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{
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int i, r;
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r = csr8r(d, Cr) | Sr;
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csr8w(d, Cr, r);
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for(i = 0; i < Timeout; i++) {
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if((csr8r(d, Cr) & Sr) == 0)
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break;
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sleep(10);
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}
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if(i >= Timeout)
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fprint(2, "%s: reset failed\n", argv0);
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sleep(100);
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}
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static int
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urlreceive(Dev *ep)
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{
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Block *b;
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uint hd;
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int n;
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b = allocb(Maxpkt+4);
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if((n = read(ep->dfd, b->wp, b->lim - b->base)) < 0){
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freeb(b);
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return -1;
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}
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if(n < 4){
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freeb(b);
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return 0;
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}
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n -= 4;
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b->wp += n;
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hd = GET2(b->wp);
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if((hd & Vpm) == 0)
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freeb(b);
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else
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etheriq(b);
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return 0;
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}
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static void
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urltransmit(Dev *ep, Block *b)
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{
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int n;
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n = BLEN(b);
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if(n < Mfl){
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memset(b->wp, 0, Mfl-n);
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b->wp += (Mfl-n);
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}
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write(ep->dfd, b->rp, BLEN(b));
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freeb(b);
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}
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static int
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urlpromiscuous(Dev *d, int on)
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{
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int r;
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r = csr16r(d, Rcr);
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if(on)
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r |= Aam|Aap;
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else {
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r &= ~Aap;
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if(nmulti == 0)
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r &= ~Aam;
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}
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return csr16w(d, Rcr, r);
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}
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static int
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urlmulticast(Dev *d, uchar*, int)
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{
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int r;
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r = csr16r(d, Rcr);
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if(nmulti)
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r |= Aam;
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else {
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if(nprom == 0)
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r &= ~Aam;
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}
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return csr16w(d, Rcr, r);
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}
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int
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urlinit(Dev *d)
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{
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int i, r;
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reset(d);
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if(mem(d, Crm, Idr0, macaddr, sizeof macaddr) < 0)
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return -1;
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reset(d);
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for(i = 0; i < sizeof macaddr; i++)
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csr8w(d, Idr0+i, macaddr[i]);
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csr8w(d, Tcr, Tr1|Tr0|Ifg1|Ifg0);
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csr16w(d, Rcr, Tail|Ad|Ab);
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r = csr16r(d, Rcr) & ~(Am | Aam | Aap);
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csr16w(d, Rcr, r);
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csr32w(d, Mar0, 0);
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csr32w(d, Mar4, 0);
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csr8w(d, Cr, Te|Re);
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epreceive = urlreceive;
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eptransmit = urltransmit;
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eppromiscuous = urlpromiscuous;
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epmulticast = urlmulticast;
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return 0;
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}
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