55 lines
1.1 KiB
C
55 lines
1.1 KiB
C
enum {
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Mhz = 1000*1000,
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};
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#define IO(t,x) ((t*)(KSEG1|((ulong)x)))
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/* Interrupts */
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#define IRQGIO0 0
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#define IRQSCSI 1
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#define IRQSCSI1 2
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#define IRQENET 3
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#define IRQGDMA 4
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#define IRQPLP 5
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#define IRQGIO1 6
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#define IRQLCL2 7
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#define IRQISDN_ISAC 8
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#define IRQPOWER 9
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#define IRQISDN_HSCX 10
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#define IRQLCL3 11
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#define IRQHPCDMA 12
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#define IRQACFAIL 13
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#define IRQVIDEO 14
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#define IRQGIO2 15
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#define IRQEISA 19
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#define IRQKBDMS 20
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#define IRQDUART 21
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#define IRQDRAIN0 22
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#define IRQDRAIN1 23
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#define IRQGIOEXP0 22
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#define IRQGIOEXP1 23
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/*
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* Local Interrupt registers (INT2)
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*/
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#define INT2_IP20 0x1fb801c0
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#define INT2_IP22 0x1fbd9000
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#define INT2_IP24 0x1fbd9880
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#define INT2_BASE INT2_IP24 /* indy */
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#define LIO_0_ISR (INT2_BASE+0x3)
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#define LIO_0_MASK (INT2_BASE+0x7)
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#define LIO_1_ISR (INT2_BASE+0xb)
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#define LIO_1_MASK (INT2_BASE+0xf)
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#define LIO_2_ISR (INT2_BASE+0x13)
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#define LIO_2_MASK (INT2_BASE+0x17)
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#define HPC3_ETHER 0x1fb80000
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#define HPC3_KBDMS 0x1fbd9800
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#define GIO_NEWPORT 0x1f0f0000 /* indy */
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#define MEMCFG0 0x1fa000c4 /* mem. size config. reg. 0 (w, rw) */
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#define MEMCFG1 0x1fa000cc /* mem. size config. reg. 1 (w, rw) */
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