586 lines
9.5 KiB
C
586 lines
9.5 KiB
C
#include "u.h"
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#include "../port/lib.h"
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#include "mem.h"
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#include "dat.h"
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#include "fns.h"
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#include "io.h"
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#include "imm.h"
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#include "../port/error.h"
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#include "../ppc/uartsmc.h"
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/*
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* PowerPC 8260 SMC UART
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*/
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enum {
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/* SMC Mode Registers */
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Clen = 0x7800, /* Character length */
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Sl = 0x0400, /* Stop length, 0: one stop bit, 1: two */
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Pen = 0x0200, /* Parity enable */
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Pm = 0x0100, /* Parity mode, 0 is odd */
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Sm = 0x0030, /* SMC mode, two bits */
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SMUart = 0x0020, /* SMC mode, 0b10 is uart */
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Dm = 0x000c, /* Diagnostic mode, 00 is normal */
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Ten = 0x0002, /* Transmit enable, 1 is enabled */
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Ren = 0x0001, /* Receive enable, 1 is enabled */
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/* SMC Event/Mask Registers */
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ce_Brke = 0x0040, /* Break end */
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ce_Br = 0x0020, /* Break character received */
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ce_Bsy = 0x0004, /* Busy condition */
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ce_Txb = 0x0002, /* Tx buffer */
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ce_Rxb = 0x0001, /* Rx buffer */
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/* Receive/Transmit Buffer Descriptor Control bits */
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BDContin= 1<<9,
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BDIdle= 1<<8,
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BDPreamble= 1<<8,
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BDBreak= 1<<5,
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BDFrame= 1<<4,
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BDParity= 1<<3,
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BDOverrun= 1<<1,
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/* Tx and Rx buffer sizes (32 bytes) */
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Rxsize= CACHELINESZ,
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Txsize= CACHELINESZ,
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};
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extern PhysUart smcphysuart;
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Uart smcuart[Nuart] = {
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{
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.name = "SMC1",
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.baud = 115200,
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.bits = 8,
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.stop = 1,
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.parity = 'n',
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.phys = &smcphysuart,
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.special = 0,
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},
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/* Only configure SMC1 for now
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{
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.name = "SMC2",
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.baud = 115200,
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.bits = 8,
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.stop = 1,
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.parity = 'n',
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.phys = &smcphysuart,
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.special = 0,
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},
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*/
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};
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int uartinited = 0;
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static void smcinterrupt(Ureg*, void*);
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static void smcputc(Uart *uart, int c);
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int
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baudgen(int baud)
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{
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int d;
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d = ((m->brghz+(baud>>1))/baud)>>4;
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if(d >= (1<<12))
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return ((d+15)>>3)|1;
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return d<<1;
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}
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static Uart*
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smcpnp(void)
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{
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int i;
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for (i = 0; i < nelem(smcuart) - 1; i++)
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smcuart[i].next = smcuart + i + 1;
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return smcuart;
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}
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void
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smcinit(Uart *uart)
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{
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Uartsmc *p;
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SMC *smc;
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UartData *ud;
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ulong lcr;
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int bits;
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ud = uart->regs;
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if (ud->initialized)
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return;
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smcsetup(uart); /* Steps 1 through 4, PPC-dependent */
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p = ud->usmc;
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smc = ud->smc;
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/* step 5: set up buffer descriptors */
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/* setup my uart structure */
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if (ud->rxb == nil)
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ud->rxb = bdalloc(1);
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if (ud->txb == nil)
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ud->txb = bdalloc(1);
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p->rbase = ((ulong)ud->rxb) - (ulong)IMMR;
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p->tbase = ((ulong)ud->txb) - (ulong)IMMR;
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/* step 8: receive buffer size */
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p->mrblr = Rxsize;
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/* step 9: */
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p->maxidl = 15;
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/* step 10: */
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p->brkln = 0;
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p->brkec = 0;
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/* step 11: */
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p->brkcr = 0;
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/* step 12: setup receive buffer */
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ud->rxb->status = BDEmpty|BDWrap|BDInt;
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ud->rxb->length = 0;
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ud->rxbuf = xspanalloc(Rxsize, 0, CACHELINESZ);
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ud->rxb->addr = PADDR(ud->rxbuf);
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/* step 13: step transmit buffer */
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ud->txb->status = BDWrap|BDInt;
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ud->txb->length = 0;
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ud->txbuf = xspanalloc(Txsize, 0, CACHELINESZ);
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ud->txb->addr = PADDR(ud->txbuf);
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/* step 14: clear events */
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smc->smce = ce_Brke | ce_Br | ce_Bsy | ce_Txb | ce_Rxb;
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/*
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* step 15: enable interrupts (done later)
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* smc->smcm = ce_Brke | ce_Br | ce_Bsy | ce_Txb | ce_Rxb;
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*/
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/* step 17: set parity, no of bits, UART mode, ... */
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lcr = SMUart;
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bits = uart->bits + 1;
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switch(uart->parity){
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case 'e':
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lcr |= (Pen|Pm);
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bits +=1;
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break;
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case 'o':
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lcr |= Pen;
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bits +=1;
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break;
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case 'n':
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default:
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break;
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}
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if(uart->stop == 2){
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lcr |= Sl;
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bits += 1;
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}
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/* Set new value and reenable if device was previously enabled */
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smc->smcmr = lcr | bits <<11 | 0x3;
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ud->initialized = 1;
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}
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static void
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smcenable(Uart *uart, int intenb)
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{
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UartData *ud;
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SMC *smc;
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int nr;
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nr = uart - smcuart;
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if (nr < 0 || nr > Nuart)
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panic("No SMC %d", nr);
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ud = uartdata + nr;
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ud->smcno = nr;
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uart->regs = ud;
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if (ud->initialized == 0)
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smcinit(uart);
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if (ud->enabled || intenb == 0)
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return;
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smc = ud->smc;
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/* clear events */
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smc->smce = ce_Brke | ce_Br | ce_Bsy | ce_Txb | ce_Rxb;
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/* enable interrupts */
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smc->smcm = ce_Brke | ce_Br | ce_Bsy | ce_Txb | ce_Rxb;
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intrenable(VecSMC1 + ud->smcno, smcinterrupt, uart, uart->name);
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ud->enabled = 1;
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}
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static long
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smcstatus(Uart* uart, void* buf, long n, long offset)
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{
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SMC *sp;
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char p[128];
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sp = ((UartData*)uart->regs)->smc;
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snprint(p, sizeof p, "b%d c%d e%d l%d m0 p%c s%d i1\n"
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"dev(%d) type(%d) framing(%d) overruns(%d)\n",
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uart->baud,
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uart->hup_dcd,
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uart->hup_dsr,
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((sp->smcmr & Clen) >>11) - ((sp->smcmr&Pen) ? 1 : 0) - ((sp->smcmr&Sl) ? 2 : 1),
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(sp->smcmr & Pen) ? ((sp->smcmr & Pm) ? 'e': 'o'): 'n',
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(sp->smcmr & Sl) ? 2: 1,
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uart->dev,
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uart->type,
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uart->ferr,
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uart->oerr
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);
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n = readstr(offset, buf, n, p);
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free(p);
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return n;
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}
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static void
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smcfifo(Uart*, int)
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{
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/*
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* Toggle FIFOs:
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* if none, do nothing;
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* reset the Rx and Tx FIFOs;
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* empty the Rx buffer and clear any interrupt conditions;
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* if enabling, try to turn them on.
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*/
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return;
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}
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static void
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smcdtr(Uart*, int)
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{
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}
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static void
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smcrts(Uart*, int)
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{
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}
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static void
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smcmodemctl(Uart*, int)
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{
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}
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static int
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smcparity(Uart* uart, int parity)
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{
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int lcr;
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SMC *sp;
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sp = ((UartData*)uart->regs)->smc;
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lcr = sp->smcmr & ~(Pen|Pm);
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/* Disable transmitter/receiver. */
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sp->smcmr &= ~(Ren | Ten);
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switch(parity){
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case 'e':
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lcr |= (Pen|Pm);
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break;
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case 'o':
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lcr |= Pen;
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break;
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case 'n':
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default:
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break;
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}
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/* Set new value and reenable if device was previously enabled */
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sp->smcmr = lcr;
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uart->parity = parity;
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return 0;
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}
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static int
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smcstop(Uart* uart, int stop)
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{
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int lcr, bits;
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SMC *sp;
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sp = ((UartData*)uart->regs)->smc;
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lcr = sp->smcmr & ~(Sl | Clen);
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/* Disable transmitter/receiver. */
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sp->smcmr &= ~(Ren | Ten);
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switch(stop){
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case 1:
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break;
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case 2:
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lcr |= Sl;
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break;
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default:
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return -1;
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}
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bits = uart->bits + ((lcr & Pen) ? 1 : 0) + ((lcr & Sl) ? 2 : 1);
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lcr |= bits<<11;
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/* Set new value and reenable if device was previously enabled */
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sp->smcmr = lcr;
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uart->stop = stop;
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return 0;
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}
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static int
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smcbits(Uart* uart, int bits)
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{
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int lcr, b;
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SMC *sp;
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if (bits < 5 || bits > 14)
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return -1;
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sp = ((UartData*)uart->regs)->smc;
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lcr = sp->smcmr & ~Clen;
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b = bits + ((sp->smcmr & Pen) ? 1 : 0) + ((sp->smcmr & Sl) ? 2 : 1);
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if (b > 15)
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return -1;
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/* Disable transmitter/receiver */
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sp->smcmr &= ~(Ren | Ten);
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/* Set new value and reenable if device was previously enabled */
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sp->smcmr = lcr | b<<11;
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uart->bits = bits;
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return 0;
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}
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static int
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smcbaud(Uart* uart, int baud)
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{
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int i;
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SMC *sp;
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if (uart->enabled){
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sp = ((UartData*)uart->regs)->smc;
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if(uart->freq == 0 || baud <= 0)
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return -1;
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i = sp - imm->smc;
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imm->brgc[i] = (((m->brghz >> 4) / baud) << 1) | 0x00010000;
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}
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uart->baud = baud;
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return 0;
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}
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static void
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smcbreak(Uart*, int)
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{
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}
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static void
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smckick(Uart *uart)
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{
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BD *txb;
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UartData *ud;
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int i;
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if(uart->blocked)
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return;
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ud = uart->regs;
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txb = ud->txb;
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if (txb->status & BDReady)
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return; /* Still busy */
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for(i = 0; i < Txsize; i++){
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if(uart->op >= uart->oe && uartstageoutput(uart) == 0)
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break;
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ud->txbuf[i] = *(uart->op++);
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}
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if (i == 0)
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return;
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dcflush(ud->txbuf, Txsize);
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txb->length = i;
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sync();
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txb->status |= BDReady|BDInt;
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}
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static void
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smcinterrupt(Ureg*, void* u)
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{
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int i, nc;
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char *buf;
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BD *rxb;
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UartData *ud;
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Uart *uart;
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uchar events;
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uart = u;
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if (uart == nil)
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panic("uart is nil");
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ud = uart->regs;
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if (ud == nil)
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panic("ud is nil");
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events = ud->smc->smce;
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ud->smc->smce = events; /* Clear events */
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if (events & 0x10)
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iprint("smc%d: break\n", ud->smcno);
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if (events & 0x4)
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uart->oerr++;
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if (events & 0x1){
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/* Receive characters
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*/
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rxb = ud->rxb;
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buf = ud->rxbuf;
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dczap(buf, Rxsize); /* invalidate data cache before copying */
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if ((rxb->status & BDEmpty) == 0){
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nc = rxb->length;
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for (i=0; i<nc; i++)
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uartrecv(uart, *buf++);
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sync();
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rxb->status |= BDEmpty;
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}else{
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iprint("uartsmc: unexpected receive event\n");
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}
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}
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if (events & 0x2){
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if ((ud->txb->status & BDReady) == 0)
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uartkick(uart);
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}
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}
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static void
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smcdisable(Uart* uart)
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{
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SMC *sp;
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sp = ((UartData*)uart->regs)->smc;
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sp->smcmr &= ~(Ren | Ten);
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}
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static int
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getchars(Uart *uart, uchar *cbuf)
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{
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int i, nc;
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char *buf;
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BD *rxb;
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UartData *ud;
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ud = uart->regs;
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rxb = ud->rxb;
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/* Wait for character to show up.
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*/
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buf = ud->rxbuf;
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while (rxb->status & BDEmpty)
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;
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nc = rxb->length;
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for (i=0; i<nc; i++)
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*cbuf++ = *buf++;
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sync();
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rxb->status |= BDEmpty;
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return(nc);
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}
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static int
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smcgetc(Uart *uart)
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{
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static uchar buf[128], *p;
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static int cnt;
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char c;
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if (cnt <= 0) {
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cnt = getchars(uart, buf);
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p = buf;
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}
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c = *p++;
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cnt--;
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return(c);
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}
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static void
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smcputc(Uart *uart, int c)
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{
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BD *txb;
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UartData *ud;
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SMC *smc;
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ud = uart->regs;
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txb = ud->txb;
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smc = ud->smc;
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smc->smcm = 0;
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/* Wait for last character to go.
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*/
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while (txb->status & BDReady)
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;
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ud->txbuf[0] = c;
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dcflush(ud->txbuf, 1);
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txb->length = 1;
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sync();
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txb->status |= BDReady;
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while (txb->status & BDReady)
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;
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}
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PhysUart smcphysuart = {
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.name = "smc",
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.pnp = smcpnp,
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.enable = smcenable,
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.disable = smcdisable,
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.kick = smckick,
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.dobreak = smcbreak,
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.baud = smcbaud,
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.bits = smcbits,
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.stop = smcstop,
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.parity = smcparity,
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.modemctl = smcmodemctl,
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.rts = smcrts,
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.dtr = smcdtr,
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.status = smcstatus,
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.fifo = smcfifo,
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.getc = smcgetc,
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.putc = smcputc,
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};
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void
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console(void)
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{
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Uart *uart;
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int n;
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char *cmd, *p;
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if((p = getconf("console")) == nil)
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return;
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n = strtoul(p, &cmd, 0);
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if(p == cmd)
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return;
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if(n < 0 || n >= nelem(smcuart))
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return;
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uart = smcuart + n;
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/* uartctl(uart, "b115200 l8 pn s1"); */
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if(*cmd != '\0')
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uartctl(uart, cmd);
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(*uart->phys->enable)(uart, 0);
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consuart = uart;
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uart->console = 1;
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}
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