153 lines
3.8 KiB
C
153 lines
3.8 KiB
C
typedef struct Flash Flash;
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typedef struct Flashchip Flashchip;
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typedef struct Flashpart Flashpart;
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typedef struct Flashregion Flashregion;
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/*
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* logical partitions
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*/
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enum {
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Maxflashpart = 8
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};
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struct Flashpart {
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char* name;
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ulong start;
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ulong end;
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};
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enum {
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Maxflashregion = 4
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};
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/*
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* physical erase block regions
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*/
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struct Flashregion {
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int n; /* number of blocks in region */
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ulong start; /* physical base address (allowing for banks) */
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ulong end;
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ulong erasesize;
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ulong eraseshift; /* log2(erasesize) */
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ulong pagesize; /* if non-0, size of pages within erase block */
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ulong pageshift; /* log2(pagesize) */
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ulong spares; /* spare bytes per page, for ecc, etc. */
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};
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/*
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* one of a set of chips in a given region
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*/
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struct Flashchip {
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int nr;
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Flashregion regions[Maxflashregion];
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uchar id; /* flash manufacturer ID */
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ushort devid; /* flash device ID */
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int width; /* bytes per flash line */
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int maxwb; /* max write buffer size */
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ulong devsize; /* physical device size */
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int alg; /* programming algorithm (if CFI) */
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int protect; /* software protection */
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};
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/*
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* structure defining a contiguous region of flash memory
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*/
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struct Flash {
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QLock; /* interlock on flash operations */
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Flash* next;
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/* following are filled in before calling Flash.reset */
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char* type;
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void* addr;
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ulong size;
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int xip; /* executing in place: don't query */
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int (*reset)(Flash*);
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/* following are filled in by the reset routine */
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int (*eraseall)(Flash*);
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int (*erasezone)(Flash*, Flashregion*, ulong);
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/* (optional) reads of correct width and alignment */
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int (*read)(Flash*, ulong, void*, long);
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/* writes of correct width and alignment */
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int (*write)(Flash*, ulong, void*, long);
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int (*suspend)(Flash*);
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int (*resume)(Flash*);
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int (*attach)(Flash*);
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/* following might be filled in by either archflashreset or reset routine */
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int nr;
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Flashregion regions[Maxflashregion];
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uchar id; /* flash manufacturer ID */
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ushort devid; /* flash device ID */
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int width; /* bytes per flash line */
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int interleave; /* addresses are interleaved across set of chips */
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int bshift; /* byte addresses are shifted */
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ulong cmask; /* command mask for interleaving */
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int maxwb; /* max write buffer size */
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ulong devsize; /* physical device size */
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int alg; /* programming algorithm (if CFI) */
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void* data; /* flash type routines' private storage, or nil */
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Flashpart part[Maxflashpart]; /* logical partitions */
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int protect; /* software protection */
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char* sort; /* "nand", "nor", "serial", nil (unspecified) */
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};
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/*
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* called by link routine of driver for specific flash type: arguments are
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* conventional name for card type/model, and card driver's reset routine.
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*/
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void addflashcard(char*, int (*)(Flash*));
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/*
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* called by devflash.c:/^flashreset; if flash exists,
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* sets type, address, and size in bytes of flash
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* and returns 0; returns -1 if flash doesn't exist
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*/
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int archflashreset(int, Flash*);
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/*
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* enable/disable write protect
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*/
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void archflashwp(Flash*, int);
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/*
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* flash access taking width and interleave into account
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*/
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int flashget(Flash*, ulong);
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void flashput(Flash*, ulong, int);
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/*
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* Architecture specific routines for managing nand devices
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*/
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/*
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* do any device spcific initialisation
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*/
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void archnand_init(Flash*);
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/*
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* if claim is 1, claim device exclusively, and enable it (power it up)
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* if claim is 0, release, and disable it (power it down)
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* claiming may be as simple as a qlock per device
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*/
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void archnand_claim(Flash*, int claim);
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/*
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* set command latch enable (CLE) and address latch enable (ALE)
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* appropriately
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*/
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void archnand_setCLEandALE(Flash*, int cle, int ale);
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/*
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* write a sequence of bytes to the device
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*/
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void archnand_write(Flash*, void *buf, int len);
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/*
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* read a sequence of bytes from the device
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* if buf is 0, throw away the data
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*/
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void archnand_read(Flash*, void *buf, int len);
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