120 lines
2.3 KiB
C
120 lines
2.3 KiB
C
#include "u.h"
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#include "../port/lib.h"
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#include "mem.h"
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#include "dat.h"
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#include "fns.h"
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#include "io.h"
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#include "ureg.h"
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#include "mp.h"
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extern void checkmtrr(void);
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static void
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squidboy(Apic* apic)
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{
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// iprint("Hello Squidboy\n");
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machinit();
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mmuinit();
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cpuidentify();
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cpuidprint();
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checkmtrr();
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apic->online = 1;
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coherence();
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lapicinit(apic);
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lapiconline();
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syncclock();
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timersinit();
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fpoff();
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lock(&active);
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active.machs |= 1<<m->machno;
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unlock(&active);
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while(!active.thunderbirdsarego)
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microdelay(100);
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schedinit();
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}
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void
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mpstartap(Apic* apic)
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{
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ulong *apbootp, *pdb, *pte;
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Mach *mach, *mach0;
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int i, machno;
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uchar *p;
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mach0 = MACHP(0);
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/*
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* Initialise the AP page-tables and Mach structure. The page-tables
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* are the same as for the bootstrap processor with the exception of
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* the PTE for the Mach structure.
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* Xspanalloc will panic if an allocation can't be made.
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*/
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p = xspanalloc(4*BY2PG, BY2PG, 0);
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pdb = (ulong*)p;
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memmove(pdb, mach0->pdb, BY2PG);
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p += BY2PG;
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if((pte = mmuwalk(pdb, MACHADDR, 1, 0)) == nil)
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return;
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memmove(p, KADDR(PPN(*pte)), BY2PG);
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*pte = PADDR(p)|PTEWRITE|PTEVALID;
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if(mach0->havepge)
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*pte |= PTEGLOBAL;
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p += BY2PG;
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mach = (Mach*)p;
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if((pte = mmuwalk(pdb, MACHADDR, 2, 0)) == nil)
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return;
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*pte = PADDR(mach)|PTEWRITE|PTEVALID;
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if(mach0->havepge)
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*pte |= PTEGLOBAL;
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p += BY2PG;
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machno = apic->machno;
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MACHP(machno) = mach;
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mach->machno = machno;
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mach->pdb = pdb;
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mach->gdt = (Segdesc*)p; /* filled by mmuinit */
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/*
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* Tell the AP where its kernel vector and pdb are.
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* The offsets are known in the AP bootstrap code.
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*/
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apbootp = (ulong*)(APBOOTSTRAP+0x08);
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*apbootp++ = (ulong)squidboy; /* assembler jumps here eventually */
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*apbootp++ = PADDR(pdb);
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*apbootp = (ulong)apic;
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/*
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* Universal Startup Algorithm.
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*/
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p = KADDR(0x467); /* warm-reset vector */
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*p++ = PADDR(APBOOTSTRAP);
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*p++ = PADDR(APBOOTSTRAP)>>8;
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i = (PADDR(APBOOTSTRAP) & ~0xFFFF)/16;
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/* code assumes i==0 */
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if(i != 0)
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print("mp: bad APBOOTSTRAP\n");
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*p++ = i;
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*p = i>>8;
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coherence();
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nvramwrite(0x0F, 0x0A); /* shutdown code: warm reset upon init ipi */
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lapicstartap(apic, PADDR(APBOOTSTRAP));
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for(i = 0; i < 1000; i++){
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if(apic->online)
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break;
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delay(10);
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}
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nvramwrite(0x0F, 0x00);
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}
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