d6e0e9c402
the only architecture dependence of devether was enabling interrupts, which is now done at the end of the driver's reset() function now. the wifi stack and dummy ethersink also go to port/. do the IRQ2->IRQ9 hack for pc kernels in intrenabale(), so not every caller of intrenable() has to be aware of it.
277 lines
6.6 KiB
C
277 lines
6.6 KiB
C
#include "u.h"
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#include "../port/lib.h"
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#include "mem.h"
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#include "dat.h"
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#include "fns.h"
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#include "io.h"
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#include "../port/error.h"
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#include "../port/netif.h"
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#include "../port/etherif.h"
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#include "ether8390.h"
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/*
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* Western Digital/Standard Microsystems Corporation cards (WD80[01]3).
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* Also handles 8216 cards (Elite Ultra).
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* Configuration code based on that provided by SMC a long time ago.
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*/
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enum { /* 83C584 Bus Interface Controller */
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Msr = 0x00, /* Memory Select Register */
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Icr = 0x01, /* Interface Configuration Register */
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Iar = 0x02, /* I/O Address Register */
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Bio = 0x03, /* BIOS ROM Address Register */
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Ear = 0x03, /* EEROM Address Register (shared with Bio) */
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Irr = 0x04, /* Interrupt Request Register */
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Hcr = 0x04, /* 8216 hardware control */
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Laar = 0x05, /* LA Address Register */
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Ijr = 0x06, /* Initialisation Jumpers */
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Gp2 = 0x07, /* General Purpose Data Register */
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Lar = 0x08, /* LAN Address Registers */
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Id = 0x0E, /* Card ID byte */
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Cksum = 0x0F, /* Checksum */
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};
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enum { /* Msr */
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Rst = 0x80, /* software reset */
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Menb = 0x40, /* memory enable */
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};
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enum { /* Icr */
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Bit16 = 0x01, /* 16-bit bus */
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Other = 0x02, /* other register access */
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Ir2 = 0x04, /* IR2 */
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Msz = 0x08, /* SRAM size */
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Rla = 0x10, /* recall LAN address */
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Rx7 = 0x20, /* recall all but I/O and LAN address */
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Rio = 0x40, /* recall I/O address from EEROM */
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Sto = 0x80, /* non-volatile EEROM store */
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};
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enum { /* Laar */
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ZeroWS16 = 0x20, /* zero wait states for 16-bit ops */
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L16en = 0x40, /* enable 16-bit LAN operation */
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M16en = 0x80, /* enable 16-bit memory access */
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};
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enum { /* Ijr */
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Ienable = 0x01, /* 8216 interrupt enable */
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};
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/*
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* Mapping from configuration bits to interrupt level.
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*/
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static int irq8003[8] = {
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9, 3, 5, 7, 10, 11, 15, 4,
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};
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static int irq8216[8] = {
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0, 9, 3, 5, 7, 10, 11, 15,
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};
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static void
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reset8003(Ether* ether, uchar ea[Eaddrlen], uchar ic[8])
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{
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Dp8390 *ctlr;
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ulong port;
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ctlr = ether->ctlr;
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port = ether->port;
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/*
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* Check for old, dumb 8003E, which doesn't have an interface
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* chip. Only Msr exists out of the 1st eight registers, reads
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* of the others just alias the 2nd eight registers, the LAN
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* address ROM. Can check Icr, Irr and Laar against the ethernet
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* address read above and if they match it's an 8003E (or an
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* 8003EBT, 8003S, 8003SH or 8003WT, doesn't matter), in which
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* case the default irq gets used.
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*/
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if(memcmp(&ea[1], &ic[1], 5) == 0){
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memset(ic, 0, sizeof(ic));
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ic[Msr] = (((ulong)ether->mem)>>13) & 0x3F;
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}
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else{
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/*
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* As a final sanity check for the 8013EBT, which doesn't have
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* the 83C584 interface chip, but has 2 real registers, write Gp2
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* and if it reads back the same, it's not an 8013EBT.
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*/
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outb(port+Gp2, 0xAA);
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inb(port+Msr); /* wiggle bus */
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if(inb(port+Gp2) != 0xAA){
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memset(ic, 0, sizeof(ic));
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ic[Msr] = (((ulong)ether->mem)>>13) & 0x3F;
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}
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else
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ether->irq = irq8003[((ic[Irr]>>5) & 0x3)|(ic[Icr] & 0x4)];
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/*
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* Check if 16-bit card.
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* If Bit16 is read/write, then it's an 8-bit card.
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* If Bit16 is set, it's in a 16-bit slot.
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*/
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outb(port+Icr, ic[Icr]^Bit16);
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inb(port+Msr); /* wiggle bus */
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if((inb(port+Icr) & Bit16) == (ic[Icr] & Bit16)){
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ctlr->width = 2;
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ic[Icr] &= ~Bit16;
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}
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outb(port+Icr, ic[Icr]);
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if(ctlr->width == 2 && (inb(port+Icr) & Bit16) == 0)
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ctlr->width = 1;
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}
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ether->mem = (ulong)KADDR((ic[Msr] & 0x3F)<<13);
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if(ctlr->width == 2)
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ether->mem |= (ic[Laar] & 0x1F)<<19;
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else
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ether->mem |= 0x80000;
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if(ic[Icr] & (1<<3))
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ether->size = 32*1024;
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if(ctlr->width == 2)
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ether->size <<= 1;
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/*
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* Enable interface RAM, set interface width.
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*/
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outb(port+Msr, ic[Msr]|Menb);
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if(ctlr->width == 2)
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outb(port+Laar, ic[Laar]|L16en|M16en|ZeroWS16);
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}
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static void
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reset8216(Ether* ether, uchar[8])
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{
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uchar hcr, irq, x;
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ulong addr, port;
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Dp8390 *ctlr;
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ctlr = ether->ctlr;
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port = ether->port;
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ctlr->width = 2;
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/*
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* Switch to the alternate register set and retrieve the memory
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* and irq information.
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*/
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hcr = inb(port+Hcr);
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outb(port+Hcr, 0x80|hcr);
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addr = inb(port+0x0B) & 0xFF;
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irq = inb(port+0x0D);
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outb(port+Hcr, hcr);
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ether->mem = (ulong)KADDR(0xC0000+((((addr>>2) & 0x30)|(addr & 0x0F))<<13));
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ether->size = 8192*(1<<((addr>>4) & 0x03));
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ether->irq = irq8216[((irq>>4) & 0x04)|((irq>>2) & 0x03)];
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/*
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* Enable interface RAM, set interface width, and enable interrupts.
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*/
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x = inb(port+Msr) & ~Rst;
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outb(port+Msr, Menb|x);
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x = inb(port+Laar);
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outb(port+Laar, M16en|x);
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outb(port+Ijr, Ienable);
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}
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/*
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* Get configuration parameters, enable memory.
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* There are opportunities here for buckets of code, try to resist.
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*/
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static int
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reset(Ether* ether)
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{
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int i;
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uchar ea[Eaddrlen], ic[8], id, nullea[Eaddrlen], sum;
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ulong port;
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Dp8390 *ctlr;
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/*
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* Set up the software configuration.
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* Use defaults for port, irq, mem and size if not specified.
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* Defaults are set for the dumb 8003E which can't be
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* autoconfigured.
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*/
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if(ether->port == 0)
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ether->port = 0x280;
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if(ether->irq == 0)
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ether->irq = 3;
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if(ether->mem == 0)
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ether->mem = 0xD0000;
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if(ether->size == 0)
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ether->size = 8*1024;
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if(ioalloc(ether->port, 0x20, 0, "wd8003") < 0)
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return -1;
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/*
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* Look for the interface. Read the LAN address ROM
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* and validate the checksum - the sum of all 8 bytes
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* should be 0xFF.
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* At the same time, get the (possible) interface chip
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* registers, they'll be used later to check for aliasing.
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*/
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port = ether->port;
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sum = 0;
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for(i = 0; i < sizeof(ea); i++){
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ea[i] = inb(port+Lar+i);
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sum += ea[i];
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ic[i] = inb(port+i);
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}
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id = inb(port+Id);
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sum += id;
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sum += inb(port+Cksum);
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if(sum != 0xFF){
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iofree(ether->port);
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return -1;
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}
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ctlr = malloc(sizeof(Dp8390));
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if(ctlr == nil){
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print("ether8003: can't allocate memory\n");
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iofree(ether->port);
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return -1;
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}
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ether->ctlr = ctlr;
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ctlr->ram = 1;
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if((id & 0xFE) == 0x2A)
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reset8216(ether, ic);
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else
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reset8003(ether, ea, ic);
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/*
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* Set the DP8390 ring addresses.
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*/
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ctlr->port = port+0x10;
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ctlr->tstart = 0;
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ctlr->pstart = HOWMANY(sizeof(Etherpkt), Dp8390BufSz);
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ctlr->pstop = HOWMANY(ether->size, Dp8390BufSz);
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/*
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* Finally, init the 8390, set the ethernet address
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* and claim the memory used.
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*/
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dp8390reset(ether);
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memset(nullea, 0, Eaddrlen);
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if(memcmp(nullea, ether->ea, Eaddrlen) == 0){
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for(i = 0; i < sizeof(ether->ea); i++)
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ether->ea[i] = ea[i];
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}
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dp8390setea(ether);
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if(umbrwmalloc(PADDR(ether->mem), ether->size, 0) == 0)
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print("ether8003: warning - 0x%luX unavailable\n",
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PADDR(ether->mem));
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return 0;
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}
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void
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ether8003link(void)
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{
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addethercard("WD8003", reset);
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}
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