163 lines
3 KiB
Plaintext
163 lines
3 KiB
Plaintext
// 386 support
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defn acidinit() // Called after all the init modules are loaded
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{
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bplist = {};
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bpfmt = 'b';
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wplist = {};
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wpflush();
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srcpath = {
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"./",
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"/sys/src/libc/port/",
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"/sys/src/libc/9sys/",
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"/sys/src/libc/386/"
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};
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srcfiles = {}; // list of loaded files
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srctext = {}; // the text of the files
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}
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defn linkreg(addr)
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{
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return 0;
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}
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defn stk() // trace
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{
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_stk(*PC, *SP, 0, 0);
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}
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defn lstk() // trace with locals
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{
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_stk(*PC, *SP, 0, 1);
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}
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defn gpr() // print general(hah hah!) purpose registers
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{
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print("AX\t", *AX, " BX\t", *BX, " CX\t", *CX, " DX\t", *DX, "\n");
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print("DI\t", *DI, " SI\t", *SI, " BP\t", *BP, "\n");
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}
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defn spr() // print special processor registers
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{
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local pc;
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local cause;
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pc = *PC;
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print("PC\t", pc, " ", fmt(pc, 'a'), " ");
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pfl(pc);
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print("SP\t", *SP, " ECODE ", *ECODE, " EFLAG ", *EFLAGS, "\n");
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print("CS\t", *CS, " DS\t ", *DS, " SS\t", *SS, "\n");
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print("GS\t", *GS, " FS\t ", *FS, " ES\t", *ES, "\n");
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cause = *TRAP;
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print("TRAP\t", cause, " ", reason(cause), "\n");
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}
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defn regs() // print all registers
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{
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spr();
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gpr();
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}
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defn fpr()
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{
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print("F0\t", *F0, "\n");
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print("F1\t", *F1, "\n");
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print("F2\t", *F2, "\n");
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print("F3\t", *F3, "\n");
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print("F4\t", *F4, "\n");
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print("F5\t", *F5, "\n");
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print("F6\t", *F6, "\n");
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print("F7\t", *F7, "\n");
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print("control\t", *FCW, "\n");
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print("status\t", *FSW, "\n");
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print("tag\t", *FTW, "\n");
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print("ip\t", *FIP, "\n");
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print("cs selector\t", *FCS, "\n");
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print("opcode\t", *FOP, "\n");
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print("data operand\t", *FDP, "\n");
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print("operand selector\t", *FDS, "\n");
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}
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defn pstop(pid)
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{
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local l;
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local pc;
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pc = (*PC)\i;
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if notes && regexp("^sys: watchpoint ", notes[0]) then
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pc--;
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print(pid,": ", reason(*TRAP), "\t");
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print(fmt(pc, 'a'), "\t", pc, "\n");
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if notes then {
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if regexp("^sys: watchpoint ", notes[0]) then
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wpprocess();
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else if notes[0] != "sys: breakpoint" then {
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print("Notes pending:\n");
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l = notes;
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while l do {
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print("\t", head l, "\n");
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l = tail l;
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}
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}
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}
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}
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aggr Ureg
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{
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'X' 0 di;
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'X' 4 si;
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'X' 8 bp;
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'X' 12 nsp;
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'X' 16 bx;
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'X' 20 dx;
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'X' 24 cx;
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'X' 28 ax;
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'X' 32 gs;
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'X' 36 fs;
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'X' 40 es;
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'X' 44 ds;
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'X' 48 trap;
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'X' 52 ecode;
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'X' 56 pc;
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'X' 60 cs;
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'X' 64 flags;
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{
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'X' 68 usp;
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'X' 68 sp;
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};
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'X' 72 ss;
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};
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defn
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Ureg(addr) {
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complex Ureg addr;
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print(" di ", addr.di, "\n");
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print(" si ", addr.si, "\n");
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print(" bp ", addr.bp, "\n");
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print(" nsp ", addr.nsp, "\n");
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print(" bx ", addr.bx, "\n");
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print(" dx ", addr.dx, "\n");
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print(" cx ", addr.cx, "\n");
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print(" ax ", addr.ax, "\n");
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print(" gs ", addr.gs, "\n");
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print(" fs ", addr.fs, "\n");
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print(" es ", addr.es, "\n");
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print(" ds ", addr.ds, "\n");
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print(" trap ", addr.trap, "\n");
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print(" ecode ", addr.ecode, "\n");
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print(" pc ", addr.pc, "\n");
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print(" cs ", addr.cs, "\n");
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print(" flags ", addr.flags, "\n");
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print(" sp ", addr.sp, "\n");
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print(" ss ", addr.ss, "\n");
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};
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sizeofUreg = 76;
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print("/sys/lib/acid/386");
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