cinap_lenrek c67d0c699f 6c: reverse register allocation order to avoid having to spill AX,DX and CX ... allocating AX,CX,DX last improves 64-bit multiplication-add chains like a*b + c*d as the multiplication does not need to save and restore AX and DX registers in most cases. reserving CX for shifts also helps.		2017-01-08 17:41:10 +01:00
..
6.out.h	6a, 6c, 6l: fix copy propagation	2014-05-30 12:28:01 +02:00
cgen.c	6c, 8c: fix "DI botch" evacuating DI/SI/CX registers to ".save" variables	2017-01-02 05:49:18 +01:00
div.c	import updated compilers from sources	2012-07-30 19:11:16 +02:00
gc.h	import updated compilers from sources	2012-07-30 19:11:16 +02:00
list.c	6c: fix missing memset in Bconv()	2015-03-01 05:33:41 +01:00
machcap.c	import updated compilers from sources	2012-07-30 19:11:16 +02:00
mkenam	import updated compilers from sources	2012-07-30 19:11:16 +02:00
mkfile	?c: track ../cc/cc.h dependency and rebuild cc.a$O as neccesary	2016-06-09 23:03:30 +02:00
mul.c	8c, 6c: fix mulgen botch error for handling multiplication by zero constant	2014-03-21 19:05:17 +01:00
peep.c	6c: subsitute floating point registers eleminating MOVSD and MOVSS instructions in peephole pass	2016-08-14 18:52:18 +02:00
reg.c	6a, 6c, 6l: fix copy propagation	2014-05-30 12:28:01 +02:00
sgen.c	8c, 6c: native ROL (cyclic shift) instruction support, improve peephole optimizers	2016-06-09 23:12:46 +02:00
swt.c	import updated compilers from sources	2012-07-30 19:11:16 +02:00
sys.c	import updated compilers from sources	2012-07-30 19:11:16 +02:00
txt.c	6c: reverse register allocation order to avoid having to spill AX,DX and CX	2017-01-08 17:41:10 +01:00