fff070f2cb
This is a work in progress port to the mntreform2 laptop. Working so far: - mmu (same as raspberry pi 3b+) - arm generic timer - gicv3 - uart1 - enet With access to the uart, one can netboot this kernel in u-boot using the following commands: > dhcp > bootm
219 lines
3.6 KiB
C
219 lines
3.6 KiB
C
/*
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* Time.
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*
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* HZ should divide 1000 evenly, ideally.
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* 100, 125, 200, 250 and 333 are okay.
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*/
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#define HZ 100 /* clock frequency */
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#define MS2HZ (1000/HZ) /* millisec per clock tick */
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#define TK2SEC(t) ((t)/HZ) /* ticks to seconds */
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enum {
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Mhz = 1000 * 1000,
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};
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typedef struct Conf Conf;
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typedef struct Confmem Confmem;
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typedef struct FPsave FPsave;
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typedef struct PFPU PFPU;
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typedef struct ISAConf ISAConf;
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typedef struct Label Label;
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typedef struct Lock Lock;
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typedef struct Memcache Memcache;
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typedef struct MMMU MMMU;
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typedef struct Mach Mach;
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typedef struct Page Page;
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typedef struct PhysUart PhysUart;
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typedef struct Pcidev Pcidev;
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typedef struct PMMU PMMU;
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typedef struct Proc Proc;
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typedef u64int PTE;
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typedef struct Soc Soc;
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typedef struct Uart Uart;
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typedef struct Ureg Ureg;
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typedef uvlong Tval;
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typedef void KMap;
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#pragma incomplete Pcidev
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#pragma incomplete Ureg
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#define MAXSYSARG 5 /* for mount(fd, mpt, flag, arg, srv) */
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/*
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* parameters for sysproc.c
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*/
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#define AOUT_MAGIC (R_MAGIC)
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struct Lock
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{
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ulong key;
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u32int sr;
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uintptr pc;
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Proc* p;
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Mach* m;
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int isilock;
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};
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struct Label
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{
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uintptr sp;
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uintptr pc;
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};
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struct FPsave
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{
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uvlong regs[32][2];
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ulong control;
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ulong status;
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};
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struct PFPU
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{
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FPsave fpsave[1];
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int fpstate;
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};
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enum
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{
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FPinit,
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FPactive,
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FPinactive,
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/* bits or'd with the state */
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FPillegal= 0x100,
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};
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struct Confmem
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{
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uintptr base;
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ulong npage;
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uintptr limit;
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uintptr kbase;
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uintptr klimit;
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};
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struct Conf
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{
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ulong nmach; /* processors */
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ulong nproc; /* processes */
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Confmem mem[3]; /* physical memory */
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ulong npage; /* total physical pages of memory */
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ulong upages; /* user page pool */
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ulong copymode; /* 0 is copy on write, 1 is copy on reference */
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ulong ialloc; /* max interrupt time allocation in bytes */
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ulong pipeqsize; /* size in bytes of pipe queues */
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ulong nimage; /* number of page cache image headers */
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ulong nswap; /* number of swap pages */
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int nswppo; /* max # of pageouts per segment pass */
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ulong hz; /* processor cycle freq */
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ulong mhz;
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int monitor; /* flag */
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};
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/*
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* MMU stuff in Mach.
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*/
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struct MMMU
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{
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PTE* mmutop; /* first level user page table */
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};
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/*
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* MMU stuff in proc
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*/
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#define NCOLOR 1 /* 1 level cache, don't worry about VCE's */
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struct PMMU
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{
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union {
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Page *mmufree; /* mmuhead[0] is freelist head */
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Page *mmuhead[PTLEVELS];
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};
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Page *mmutail[PTLEVELS];
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int asid;
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uintptr tpidr;
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};
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#include "../port/portdat.h"
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struct Mach
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{
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int machno; /* physical id of processor */
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uintptr splpc; /* pc of last caller to splhi */
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Proc* proc; /* current process on this processor */
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/* end of offsets known to asm */
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MMMU;
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PMach;
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int cputype;
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ulong delayloop;
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int cpumhz;
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uvlong cpuhz; /* speed of cpu */
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int stack[1];
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};
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struct
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{
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char machs[MAXMACH]; /* active CPUs */
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int exiting; /* shutdown */
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}active;
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#define MACHP(n) ((Mach*)MACHADDR(n))
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extern register Mach* m; /* R27 */
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extern register Proc* up; /* R26 */
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extern int normalprint;
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/*
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* a parsed plan9.ini line
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*/
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#define NISAOPT 8
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struct ISAConf {
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char *type;
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uvlong port;
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int irq;
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ulong dma;
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ulong mem;
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ulong size;
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ulong freq;
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int nopt;
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char *opt[NISAOPT];
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};
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/*
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* Horrid. But the alternative is 'defined'.
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*/
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#ifdef _DBGC_
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#define DBGFLG (dbgflg[_DBGC_])
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#else
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#define DBGFLG (0)
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#endif /* _DBGC_ */
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int vflag;
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extern char dbgflg[256];
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#define dbgprint print /* for now */
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/*
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* hardware info about a device
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*/
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typedef struct {
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ulong port;
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int size;
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} Devport;
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struct DevConf
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{
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ulong intnum; /* interrupt number */
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char *type; /* card type, malloced */
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int nports; /* Number of ports */
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Devport *ports; /* The ports themselves */
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};
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