128ea44a89
a portable SG_NOEXEC segment attribute was added to allow non-executable (physical) segments. which will set the PTENOEXEC bits for putmmu(). in the future, this can be used to make non-executable stack / bss segments. the SG_DEVICE attribute was added to distinguish between mmio regions and uncached memory. only matterns on arm64. on arm, theres the issue that PTEUNCACHED would have no bits set when using the hardware bit definitions. this is the reason bcm, kw, teg2 and omap kernels use arteficial PTE constants. on zynq, the XN bit was used as a hack to give PTEUNCACHED a non-zero value and when the bit is clear then cache attributes where added to the pte. to fix this, PTECACHED constant was added. the portable mmu code in fault.c will now explicitely set PTECACHED bits for cached memory and PTEUNCACHED for uncached memory. that way the hardware bit definitions can be used everywhere.
101 lines
2.7 KiB
C
101 lines
2.7 KiB
C
/*
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* Memory and machine-specific definitions. Used in C and assembler.
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*/
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#define KiB 1024u /* Kibi 0x0000000000000400 */
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#define MiB 1048576u /* Mebi 0x0000000000100000 */
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#define GiB 1073741824u /* Gibi 000000000040000000 */
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/*
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* Sizes
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*/
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#define BY2PG (4*KiB) /* bytes per page */
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#define PGSHIFT 12 /* log(BY2PG) */
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#define PGROUND(s) ROUND(s, BY2PG)
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#define ROUND(s, sz) (((s)+(sz-1))&~(sz-1))
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#define MAXMACH 4 /* max # cpus system can run */
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#define MACHSIZE BY2PG
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#define L1SIZE (4 * BY2PG)
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#define KSTACK (8*KiB)
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#define STACKALIGN(sp) ((sp) & ~3) /* bug: assure with alloc */
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/*
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* Magic registers
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*/
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#define USER 9 /* R9 is up-> */
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#define MACH 10 /* R10 is m-> */
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/*
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* Address spaces.
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* KTZERO is used by kprof and dumpstack (if any).
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*
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* KZERO is mapped to physical 0 (start of ram).
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*
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* vectors are at 0, plan9.ini is at KZERO+256 and is limited to 16K by
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* devenv.
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*/
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#define KSEG0 0x80000000 /* kernel segment */
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/* mask to check segment; good for 1GB dram */
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#define KSEGM 0xC0000000
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#define KZERO KSEG0 /* kernel address space */
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#define CONFADDR (KZERO+0x100) /* unparsed plan9.ini */
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#define REBOOTADDR (0x1c00) /* reboot code - physical address */
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#define MACHADDR (KZERO+0x2000) /* Mach structure */
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#define L2 (KZERO+0x3000) /* L2 ptes for vectors etc */
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#define VCBUFFER (KZERO+0x3400) /* videocore mailbox buffer */
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#define FIQSTKTOP (KZERO+0x4000) /* FIQ stack */
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#define L1 (KZERO+0x4000) /* tt ptes: 16KiB aligned */
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#define KTZERO (KZERO+0x8000) /* kernel text start */
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#define VIRTIO (0x7E000000) /* i/o registers */
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#define ARMLOCAL (0x7F000000) /* armv7 only */
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#define VGPIO (ARMLOCAL+MiB) /* virtual gpio for pi3 ACT LED */
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#define FRAMEBUFFER 0xC0000000 /* video framebuffer */
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#define UZERO 0 /* user segment */
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#define UTZERO (UZERO+BY2PG) /* user text start */
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#define USTKTOP 0x40000000 /* user segment end +1 */
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#define USTKSIZE (8*1024*1024) /* user stack size */
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/*
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* Legacy...
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*/
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#define BLOCKALIGN 64 /* only used in allocb.c */
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/*
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* Sizes
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*/
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#define BI2BY 8 /* bits per byte */
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#define BY2SE 4
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#define BY2WD 4
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#define BY2V 8 /* only used in xalloc.c */
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#define PTEMAPMEM (1024*1024)
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#define PTEPERTAB (PTEMAPMEM/BY2PG)
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#define SEGMAPSIZE 1984
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#define SSEGMAPSIZE 16
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#define PPN(x) ((x)&~(BY2PG-1))
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/*
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* These bits are completely artificial.
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* With a little work these move to port.
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*/
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#define PTEVALID (1<<0)
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#define PTERONLY 0
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#define PTEWRITE (1<<1)
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#define PTECACHED 0
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#define PTEUNCACHED (1<<2)
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#define PTENOEXEC (1<<4)
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/*
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* Physical machine information from here on.
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* PHYS addresses as seen from the arm cpu.
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* BUS addresses as seen from the videocore gpu.
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*/
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#define PHYSDRAM 0
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#define MIN(a, b) ((a) < (b)? (a): (b))
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#define MAX(a, b) ((a) > (b)? (a): (b))
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