62ffb9c16e
when libmach is compiled with 6c, unions in the 32bit Uregs cause fields to be wronly aligned. use #pragma pack arround the #include "/$objtype/include/ureg.h" statement.
121 lines
3.4 KiB
C
121 lines
3.4 KiB
C
/*
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* mips definition
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*/
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#include <u.h>
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#include <libc.h>
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#include <bio.h>
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#include <mach.h>
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#pragma pack on
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#include "/mips/include/ureg.h"
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#pragma pack off
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#define REGOFF(x) (uintptr)(&((struct Ureg *) 0)->x)
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#define SP REGOFF(sp)
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#define PC REGOFF(pc)
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#define R1 REGOFF(r1)
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#define R31 REGOFF(r31)
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#define FP_REG(x) (R1+4+4*(x))
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#define REGSIZE sizeof(struct Ureg)
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#define FPREGSIZE (4*33)
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Reglist mipsreglist[] = {
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{"STATUS", REGOFF(status), RINT|RRDONLY, 'X'},
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{"CAUSE", REGOFF(cause), RINT|RRDONLY, 'X'},
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{"BADVADDR", REGOFF(badvaddr), RINT|RRDONLY, 'X'},
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{"TLBVIRT", REGOFF(tlbvirt), RINT|RRDONLY, 'X'},
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{"HI", REGOFF(hi), RINT|RRDONLY, 'X'},
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{"LO", REGOFF(lo), RINT|RRDONLY, 'X'},
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{"PC", PC, RINT, 'X'},
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{"SP", SP, RINT, 'X'},
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{"R31", R31, RINT, 'X'},
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{"R30", REGOFF(r30), RINT, 'X'},
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{"R28", REGOFF(r28), RINT, 'X'},
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{"R27", REGOFF(r27), RINT, 'X'},
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{"R26", REGOFF(r26), RINT, 'X'},
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{"R25", REGOFF(r25), RINT, 'X'},
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{"R24", REGOFF(r24), RINT, 'X'},
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{"R23", REGOFF(r23), RINT, 'X'},
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{"R22", REGOFF(r22), RINT, 'X'},
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{"R21", REGOFF(r21), RINT, 'X'},
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{"R20", REGOFF(r20), RINT, 'X'},
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{"R19", REGOFF(r19), RINT, 'X'},
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{"R18", REGOFF(r18), RINT, 'X'},
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{"R17", REGOFF(r17), RINT, 'X'},
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{"R16", REGOFF(r16), RINT, 'X'},
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{"R15", REGOFF(r15), RINT, 'X'},
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{"R14", REGOFF(r14), RINT, 'X'},
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{"R13", REGOFF(r13), RINT, 'X'},
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{"R12", REGOFF(r12), RINT, 'X'},
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{"R11", REGOFF(r11), RINT, 'X'},
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{"R10", REGOFF(r10), RINT, 'X'},
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{"R9", REGOFF(r9), RINT, 'X'},
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{"R8", REGOFF(r8), RINT, 'X'},
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{"R7", REGOFF(r7), RINT, 'X'},
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{"R6", REGOFF(r6), RINT, 'X'},
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{"R5", REGOFF(r5), RINT, 'X'},
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{"R4", REGOFF(r4), RINT, 'X'},
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{"R3", REGOFF(r3), RINT, 'X'},
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{"R2", REGOFF(r2), RINT, 'X'},
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{"R1", REGOFF(r1), RINT, 'X'},
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{"F0", FP_REG(0), RFLT, 'F'},
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{"F1", FP_REG(1), RFLT, 'f'},
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{"F2", FP_REG(2), RFLT, 'F'},
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{"F3", FP_REG(3), RFLT, 'f'},
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{"F4", FP_REG(4), RFLT, 'F'},
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{"F5", FP_REG(5), RFLT, 'f'},
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{"F6", FP_REG(6), RFLT, 'F'},
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{"F7", FP_REG(7), RFLT, 'f'},
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{"F8", FP_REG(8), RFLT, 'F'},
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{"F9", FP_REG(9), RFLT, 'f'},
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{"F10", FP_REG(10), RFLT, 'F'},
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{"F11", FP_REG(11), RFLT, 'f'},
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{"F12", FP_REG(12), RFLT, 'F'},
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{"F13", FP_REG(13), RFLT, 'f'},
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{"F14", FP_REG(14), RFLT, 'F'},
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{"F15", FP_REG(15), RFLT, 'f'},
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{"F16", FP_REG(16), RFLT, 'F'},
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{"F17", FP_REG(17), RFLT, 'f'},
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{"F18", FP_REG(18), RFLT, 'F'},
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{"F19", FP_REG(19), RFLT, 'f'},
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{"F20", FP_REG(20), RFLT, 'F'},
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{"F21", FP_REG(21), RFLT, 'f'},
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{"F22", FP_REG(22), RFLT, 'F'},
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{"F23", FP_REG(23), RFLT, 'f'},
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{"F24", FP_REG(24), RFLT, 'F'},
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{"F25", FP_REG(25), RFLT, 'f'},
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{"F26", FP_REG(26), RFLT, 'F'},
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{"F27", FP_REG(27), RFLT, 'f'},
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{"F28", FP_REG(28), RFLT, 'F'},
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{"F29", FP_REG(29), RFLT, 'f'},
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{"F30", FP_REG(30), RFLT, 'F'},
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{"F31", FP_REG(31), RFLT, 'f'},
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{"FPCR", FP_REG(32), RFLT, 'X'},
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{ 0 }
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};
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/* the machine description */
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Mach mmips =
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{
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"mips",
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MMIPS, /* machine type */
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mipsreglist, /* register set */
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REGSIZE, /* number of bytes in reg set */
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FPREGSIZE, /* number of bytes in fp reg set */
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"PC", /* name of PC */
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"SP", /* name of SP */
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"R31", /* name of link register */
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"setR30", /* static base register name */
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0, /* value */
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0x1000, /* page size */
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0xC0000000ULL, /* kernel base */
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0x40000000ULL, /* kernel text mask */
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0x7FFFFFFFULL, /* user stack top */
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4, /* quantization of pc */
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4, /* szaddr */
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4, /* szreg */
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4, /* szfloat */
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8, /* szdouble */
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};
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