![]() The new MTRR code handles overlapping ranges and supports AMD specific TOM2 MSR. The format in /dev/archctl now only shows the effective cache ranges only, without exposing the low level registers. |
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doc | ||
games/lib | ||
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man | ||
src |
![]() The new MTRR code handles overlapping ranges and supports AMD specific TOM2 MSR. The format in /dev/archctl now only shows the effective cache ranges only, without exposing the low level registers. |
||
---|---|---|
.. | ||
doc | ||
games/lib | ||
include | ||
lib | ||
man | ||
src |