Commit graph

1825 commits

Author SHA1 Message Date
aiju d64f76c96c add cycv ethernet driver 2020-01-10 18:49:33 +00:00
aiju 17ebe55031 add cycv kernel 2020-01-08 02:35:01 +00:00
cinap_lenrek f12744b5db devip: fix packet loss when interface is wlocked
to prevent deadlock on media unbind (which is called with
the interface wlock()'ed), the medias reader processes
that unbind was waiting for used to discard packets when
the interface could not be rlocked.

this has the unfortunate side effect that when we change
addresses on a interface that packets are getting lost.
this is problematic for the processing of ipv6 router
advertisements when multiple RA's are getting received
in quick succession.

this change removes that packet dropping behaviour and
instead changes the unbind process to avoid the deadlock
by wunlock()ing the interface temporarily while waiting
for the reader processes to finish. the interface media
is also changed to the mullmedium before unlocking (see
the comment).
2020-01-05 18:20:47 +01:00
Alex Musolino 8fa9b7d6ff pc, pc64: fix cputemp decimal handling in amd10temprd (thanks Robert Ransom) 2019-12-19 15:19:02 +10:30
cinap_lenrek 52e4e51b50 devcons: fix write length of writebintime() (thanks BurnZeZ) 2019-12-11 23:52:05 +01:00
cinap_lenrek 13785bbbef pc: replace duplicated and broken mmu flush code in vunmap()
comparing m with MACHP() is wrong as m is a constant on 386.

add procflushothers(), which flushes all processes except up
using common procflushmmu() routine.
2019-12-07 02:19:14 +01:00
cinap_lenrek 28836f3ff5 kernel: avoid useless mmu flushes, implement better wait condition for procflushmmu()
procflushmmu() returns once all *OTHER* processors that had
matching processes running on them flushed ther tlb/mmu state.
the caller of procflush...() takes care of flushing "up" by
calling flushmmu() later.

if the current process matched, then that means m->flushmmu
would be set, and hzclock() would call flushmmu() again.

to avoid this, we now check up->newtlb in addition to m->flushmmu
in hzclock() before calling flushmmu().

we also maintain information on which process on what processor
to wait for locally, which helps making progress when multiple
procflushmmu()'s are running concurrently.

in addition, this makes the wait condition for procflushmmu()
more sophisticated, by validating if the processor still runs
the selected process and only if it matchatches, considers
the MACHP(nm)->flushmmu flag.
2019-12-07 02:13:51 +01:00
cinap_lenrek f48f1a324a bcm: use extended small pages so XN bit can work
the change to support no-execute bits broke the original
raspberry pi1, as it uses backwards compatible page table
format.

to use the XN bit, subpage AP bits have to be disabled
using the XP bit in CP15 Control Register c1 Bit 23.
2019-12-04 22:02:51 +01:00
cinap_lenrek c9570c14af 9/boot/net.rc: suppress error from grep if ethernet ifstats file is not found
this can happen with nusb/ether, which does not implement ifstats file.
2019-12-04 21:56:13 +01:00
cinap_lenrek 5d59a44c21 pc, pc64: clear debug watchpoint registers on exec and exit
when a process does an exec syscall, procsetup() is called and
we have to disable the debug watchpoint registers. just clearing
p->dr is not enougth as we are not going thru a procsave() and
procrestore() cycle which would disable and reload the saved
debug registers.

instead of clearing debug registers in procfork(), we should
clear the saved debug registers before a process goes to die
(pexit() calls sched() with up->state = Moribund) as the Proc
structure can get reused for kernel processes (kproc) which
never call procfork() and would therefore have debug registers
loaded.
2019-12-02 23:32:24 +01:00
cinap_lenrek d80826d6e5 vgai81x: remove unused mach0 variable 2019-12-02 08:26:34 +01:00
cinap_lenrek a9be1374a0 pc: fix ldt memory leak in procsetup() 2019-12-02 07:43:45 +01:00
cinap_lenrek 70498378cf kernel: add missing FPillegal definition for kw and omap kernels 2019-12-02 07:35:25 +01:00
cinap_lenrek 08d6b0f043 kernel: improve diagnostics by reversing the roles of Proc.parentpid and Proc.parent
for better system diagnostics, we *ALWAYS* want to record the parent
pid of a user process, regardless of if the child will post a wait
record on exit or not.

for that, we reverse the roles of Proc.parent and Proc.parentpid so
Proc.parentpid will always be set on rfork() and the Proc.parent
pointer will point to the parent's Proc structure or is set to nil
when no wait record should be posted on exit (RFNOWAIT flag).

this means that we can get the pid of the original parent process
from /proc, regardless of the the child having rforked with the
RFNOWAIT flag. this improves the output of pstree(1) somewhat if
the parent is still alive. note that theres no guarantee that the
parent pid is still valid.

the conditions are unchanged:

a user process that will post wait record has:

up->kp == 0 && up->parent != nil && up->parent->pid == up->parentpid

the boot process is:

up->kp == 0 && up->parent == nil && up->parentpid == 0

and kproc's have:

up->kp != 0 && up->parent == nil && up->parentpid == 0
2019-12-01 17:57:14 +01:00
cinap_lenrek 21a599743e pc, pc64: merge adjacent e820 map entries of same type
some machines give us over 300 e820 ram entries that are
all adjacent to each other causing us to run out of Map
end Emap entries.

this change adds e820clean() function, which sorts the
current e820 map and discards unusable entries and merges
adjacent entries. e820clean() is called after we parsed
the *e820= boot parameter or when we run out of entries.

an example of such a broken e820 map (thanks mischief):

*e820=1 0000000000000000 0000000000008000 1 0000000000008000 000000000000c000 1 000000000000c000 000000000003f000 1 000000000003f000 0000000000040000 1 0000000000040000 00000000000a0000 1 0000000000100000 0000000001000000 1 0000000001000000 0000000001020000 1 0000000001020000 0000000009d82000 2 0000000009d82000 000000000a000000 1 000000000a000000 000000000a200000 4 000000000a200000 000000000a20b000 1 000000000a20b000 000000000b000000 2 000000000b000000 000000000b020000 1 000000000b020000 0000000010000000 1 0000000010000000 000000001000b000 1 000000001000b000 00000000d9634000 1 00000000d9634000 00000000d96be000 1 00000000d96be000 00000000d96cc000 1 00000000d96cc000 00000000d96db000 1 00000000d96db000 00000000d97df000 1 00000000d97df000 00000000d97ed000 1 00000000d97ed000 00000000d9837000 1 00000000d9837000 00000000d9844000 1 00000000d9844000 00000000d985e000 1 00000000d985e000 00000000d9865000 1 00000000d9865000 00000000d9897000 1 00000000d9897000 00000000d98d7000 1 00000000d98d7000 00000000d98db000 1 00000000d98db000 00000000d98dd000 1 00000000d98dd000 00000000d999d000 1 00000000d999d000 00000000d9a8e000 1 00000000d9a8e000 00000000d9add000 1 00000000d9add000 00000000d9ae2000 1 00000000d9ae2000 00000000d9af3000 1 00000000d9af3000 00000000d9af4000 1 00000000d9af4000 00000000d9af6000 1 00000000d9af6000 00000000d9af7000 1 00000000d9af7000 00000000d9af8000 1 00000000d9af8000 00000000d9af9000 1 00000000d9af9000 00000000d9b5e000 1 00000000d9b5e000 00000000d9b60000 1 00000000d9b60000 00000000d9b8c000 1 00000000d9b8c000 00000000d9b8d000 1 00000000d9b8d000 00000000d9c85000 1 00000000d9c85000 00000000d9c8a000 1 00000000d9c8a000 00000000d9caf000 1 00000000d9caf000 00000000d9cb5000 1 00000000d9cb5000 00000000d9cc1000 1 00000000d9cc1000 00000000d9cc2000 1 00000000d9cc2000 00000000da986000 1 00000000da986000 00000000daeb6000 1 00000000daeb6000 00000000daed7000 1 00000000daed7000 00000000daed8000 1 00000000daed8000 00000000daf61000 1 00000000daf61000 00000000daf7c000 1 00000000daf7c000 00000000db3e6000 1 00000000db3e6000 00000000db4ea000 1 00000000db4ea000 00000000db57d000 1 00000000db57d000 00000000db587000 1 00000000db587000 00000000db58a000 1 00000000db58a000 00000000db58b000 1 00000000db58b000 00000000db591000 1 00000000db591000 00000000db5a7000 1 00000000db5a7000 00000000db5b2000 1 00000000db5b2000 00000000db5ba000 1 00000000db5ba000 00000000db5bb000 1 00000000db5bb000 00000000db5c6000 1 00000000db5c6000 00000000db5c7000 1 00000000db5c7000 00000000db5c8000 1 00000000db5c8000 00000000db5c9000 1 00000000db5c9000 00000000db5cb000 1 00000000db5cb000 00000000db5d0000 1 00000000db5d0000 00000000db5e8000 1 00000000db5e8000 00000000db5ea000 1 00000000db5ea000 00000000db5eb000 1 00000000db5eb000 00000000db5ee000 1 00000000db5ee000 00000000db601000 1 00000000db601000 00000000db602000 1 00000000db602000 00000000db60e000 1 00000000db60e000 00000000db610000 1 00000000db610000 00000000db612000 1 00000000db612000 00000000db614000 1 00000000db614000 00000000db61d000 1 00000000db61d000 00000000db645000 1 00000000db645000 00000000db64c000 1 00000000db64c000 00000000db650000 1 00000000db650000 00000000db651000 1 00000000db651000 00000000db653000 1 00000000db653000 00000000db658000 1 00000000db658000 00000000db659000 1 00000000db659000 00000000db661000 1 00000000db661000 00000000db662000 1 00000000db662000 00000000db665000 1 00000000db665000 00000000db677000 1 00000000db677000 00000000db69d000 1 00000000db69d000 00000000db6a0000 1 00000000db6a0000 00000000db6a8000 1 00000000db6a8000 00000000db6ae000 1 00000000db6ae000 00000000db6c2000 1 00000000db6c2000 00000000db6d4000 1 00000000db6d4000 00000000db6de000 1 00000000db6de000 00000000db6e0000 1 00000000db6e0000 00000000db6e2000 1 00000000db6e2000 00000000db6ef000 1 00000000db6ef000 00000000db6f0000 1 00000000db6f0000 00000000db6f2000 1 00000000db6f2000 00000000db6f3000 1 00000000db6f3000 00000000db810000 1 00000000db810000 00000000db815000 1 00000000db815000 00000000db81f000 1 00000000db81f000 00000000db821000 1 00000000db821000 00000000db85d000 1 00000000db85d000 00000000db869000 1 00000000db869000 00000000db881000 1 00000000db881000 00000000db889000 1 00000000db889000 00000000db88e000 1 00000000db88e000 00000000db88f000 1 00000000db88f000 00000000db891000 1 00000000db891000 00000000db899000 1 00000000db899000 00000000db8a9000 1 00000000db8a9000 00000000db8ab000 1 00000000db8ab000 00000000db8af000 1 00000000db8af000 00000000db8b1000 1 00000000db8b1000 00000000db8b5000 1 00000000db8b5000 00000000db8b7000 1 00000000db8b7000 00000000db8be000 1 00000000db8be000 00000000db8c2000 1 00000000db8c2000 00000000db8c7000 1 00000000db8c7000 00000000db8cf000 1 00000000db8cf000 00000000db8e0000 1 00000000db8e0000 00000000db8e1000 1 00000000db8e1000 00000000db8e2000 1 00000000db8e2000 00000000db8e6000 1 00000000db8e6000 00000000db8e8000 1 00000000db8e8000 00000000db8f4000 1 00000000db8f4000 00000000db904000 1 00000000db904000 00000000db90c000 1 00000000db90c000 00000000db91c000 1 00000000db91c000 00000000db91d000 1 00000000db91d000 00000000db922000 1 00000000db922000 00000000db923000 1 00000000db923000 00000000db929000 1 00000000db929000 00000000db92b000 1 00000000db92b000 00000000db92d000 1 00000000db92d000 00000000db92f000 1 00000000db92f000 00000000db933000 1 00000000db933000 00000000db934000 1 00000000db934000 00000000db936000 1 00000000db936000 00000000db937000 1 00000000db937000 00000000db952000 1 00000000db952000 00000000db96b000 1 00000000db96b000 00000000db998000 1 00000000db998000 00000000db9a1000 1 00000000db9a1000 00000000db9a2000 1 00000000db9a2000 00000000db9a3000 1 00000000db9a3000 00000000db9a4000 1 00000000db9a4000 00000000db9a5000 1 00000000db9a5000 00000000db9a7000 1 00000000db9a7000 00000000db9a8000 1 00000000db9a8000 00000000db9aa000 1 00000000db9aa000 00000000db9ba000 1 00000000db9ba000 00000000db9da000 1 00000000db9da000 00000000db9f7000 1 00000000db9f7000 00000000dba00000 1 00000000dba00000 00000000dba0a000 1 00000000dba0a000 00000000dba11000 1 00000000dba11000 00000000dba12000 1 00000000dba12000 00000000dba51000 1 00000000dba51000 00000000dba5d000 1 00000000dba5d000 00000000dba6c000 1 00000000dba6c000 00000000dba88000 1 00000000dba88000 00000000dba92000 1 00000000dba92000 00000000dba94000 1 00000000dba94000 00000000dbac0000 1 00000000dbac0000 00000000dbac6000 1 00000000dbac6000 00000000dbad2000 1 00000000dbad2000 00000000dbad9000 1 00000000dbad9000 00000000dbae0000 1 00000000dbae0000 00000000dbaeb000 1 00000000dbaeb000 00000000dbaf6000 1 00000000dbaf6000 00000000dbb01000 1 00000000dbb01000 00000000dbb17000 1 00000000dbb17000 00000000dbb1f000 1 00000000dbb1f000 00000000dbb20000 1 00000000dbb20000 00000000dbb23000 1 00000000dbb23000 00000000dbb24000 1 00000000dbb24000 00000000dbb25000 1 00000000dbb25000 00000000dbb3a000 1 00000000dbb3a000 00000000dbb3d000 1 00000000dbb3d000 00000000dbb43000 1 00000000dbb43000 00000000dbb45000 1 00000000dbb45000 00000000dbb49000 1 00000000dbb49000 00000000dbb4c000 1 00000000dbb4c000 00000000dbb4e000 1 00000000dbb4e000 00000000dbb51000 1 00000000dbb51000 00000000dbb54000 1 00000000dbb54000 00000000dbb5a000 1 00000000dbb5a000 00000000dbb5e000 1 00000000dbb5e000 00000000dbb62000 1 00000000dbb62000 00000000dbb67000 1 00000000dbb67000 00000000dbb91000 1 00000000dbb91000 00000000dbb93000 1 00000000dbb93000 00000000dbb94000 1 00000000dbb94000 00000000dbb9d000 1 00000000dbb9d000 00000000dbb9f000 1 00000000dbb9f000 00000000dbbcf000 1 00000000dbbcf000 00000000dbbd0000 1 00000000dbbd0000 00000000dbbd1000 1 00000000dbbd1000 00000000dbbd5000 1 00000000dbbd5000 00000000dbbd6000 1 00000000dbbd6000 00000000dbbd7000 1 00000000dbbd7000 00000000dbbd8000 1 00000000dbbd8000 00000000dbbd9000 1 00000000dbbd9000 00000000dbbdd000 1 00000000dbbdd000 00000000dbbdf000 1 00000000dbbdf000 00000000dbbe1000 1 00000000dbbe1000 00000000dbbeb000 1 00000000dbbeb000 00000000dbbec000 1 00000000dbbec000 00000000dbbef000 1 00000000dbbef000 00000000dbbff000 1 00000000dbbff000 00000000dbc01000 1 00000000dbc01000 00000000dbc05000 1 00000000dbc05000 00000000dbc0f000 1 00000000dbc0f000 00000000dbc11000 1 00000000dbc11000 00000000dbc12000 1 00000000dbc12000 00000000dbc14000 1 00000000dbc14000 00000000dbc15000 1 00000000dbc15000 00000000dbc20000 1 00000000dbc20000 00000000dbc21000 1 00000000dbc21000 00000000dbc22000 1 00000000dbc22000 00000000dbc2a000 1 00000000dbc2a000 00000000dbc2c000 1 00000000dbc2c000 00000000dbc2d000 1 00000000dbc2d000 00000000dbc2f000 1 00000000dbc2f000 00000000dbc30000 1 00000000dbc30000 00000000dbc42000 1 00000000dbc42000 00000000dbc44000 1 00000000dbc44000 00000000dbc54000 1 00000000dbc54000 00000000dbc5c000 1 00000000dbc5c000 00000000dbc5e000 1 00000000dbc5e000 00000000dbc60000 1 00000000dbc60000 00000000dbc64000 1 00000000dbc64000 00000000dbc6d000 1 00000000dbc6d000 00000000dbc7f000 1 00000000dbc7f000 00000000dbc85000 1 00000000dbc85000 00000000dbca3000 1 00000000dbca3000 00000000dbca6000 1 00000000dbca6000 00000000dbcb9000 1 00000000dbcb9000 00000000dbcba000 1 00000000dbcba000 00000000dbcbb000 1 00000000dbcbb000 00000000dbcbc000 1 00000000dbcbc000 00000000dbcbd000 1 00000000dbcbd000 00000000dbcd5000 1 00000000dbcd5000 00000000dbcd8000 1 00000000dbcd8000 00000000dbcd9000 1 00000000dbcd9000 00000000dbcda000 1 00000000dbcda000 00000000dbce1000 1 00000000dbce1000 00000000dbce3000 1 00000000dbce3000 00000000dbce4000 1 00000000dbce4000 00000000dbd06000 1 00000000dbd06000 00000000dbd07000 1 00000000dbd07000 00000000dbd0a000 1 00000000dbd0a000 00000000dbd0b000 1 00000000dbd0b000 00000000dbd0c000 1 00000000dbd0c000 00000000dbd0e000 1 00000000dbd0e000 00000000dbd10000 1 00000000dbd10000 00000000dbd12000 1 00000000dbd12000 00000000dbd15000 1 00000000dbd15000 00000000dbd17000 1 00000000dbd17000 00000000dbd19000 1 00000000dbd19000 00000000dbd1b000 1 00000000dbd1b000 00000000dbd44000 1 00000000dbd44000 00000000dbd46000 1 00000000dbd46000 00000000dbd60000 1 00000000dbd60000 00000000dbd70000 1 00000000dbd70000 00000000dbd79000 1 00000000dbd79000 00000000dbd7a000 1 00000000dbd7a000 00000000dbd7c000 1 00000000dbd7c000 00000000dbd7d000 1 00000000dbd7d000 00000000dbd90000 1 00000000dbd90000 00000000dbd93000 1 00000000dbd93000 00000000dbd97000 1 00000000dbd97000 00000000dbd9a000 1 00000000dbd9a000 00000000dbd9b000 1 00000000dbd9b000 00000000dbd9e000 1 00000000dbd9e000 00000000dbda1000 1 00000000dbda1000 00000000dbda5000 1 00000000dbda5000 00000000dbda9000 1 00000000dbda9000 00000000dbdaf000 1 00000000dbdaf000 00000000dbdb3000 1 00000000dbdb3000 00000000dbdb4000 1 00000000dbdb4000 00000000dbdbe000 1 00000000dbdbe000 00000000dbdbf000 1 00000000dbdbf000 00000000dbdc0000 1 00000000dbdc0000 00000000dbdc1000 1 00000000dbdc1000 00000000dbdc2000 1 00000000dbdc2000 00000000dbdc5000 1 00000000dbdc5000 00000000dbdc6000 1 00000000dbdc6000 00000000dbdc7000 1 00000000dbdc7000 00000000dbdcb000 1 00000000dbdcb000 00000000dbdcf000 1 00000000dbdcf000 00000000dbdd5000 1 00000000dbdd5000 00000000dbdd8000 1 00000000dbdd8000 00000000dbddf000 1 00000000dbddf000 00000000dbde1000 1 00000000dbde1000 00000000dbde5000 1 00000000dbde5000 00000000dbde8000 1 00000000dbde8000 00000000dbded000 1 00000000dbded000 00000000dbdf0000 1 00000000dbdf0000 00000000dbdf4000 1 00000000dbdf4000 00000000dbdf7000 1 00000000dbdf7000 00000000dbdfb000 1 00000000dbdfb000 00000000dbe1e000 1 00000000dbe1e000 00000000dbe20000 1 00000000dbe20000 00000000dbe23000 1 00000000dbe23000 00000000dbe27000 1 00000000dbe27000 00000000dbe28000 1 00000000dbe28000 00000000dbe2a000 1 00000000dbe2a000 00000000dbe2b000 1 00000000dbe2b000 00000000dc24d000 1 00000000dc24d000 00000000dc25c000 1 00000000dc25c000 00000000dc25d000 1 00000000dc25d000 00000000dc25e000 1 00000000dc25e000 00000000dc273000 1 00000000dc273000 00000000dc274000 1 00000000dc274000 00000000dc275000 1 00000000dc275000 00000000dc276000 1 00000000dc276000 00000000dc27a000 1 00000000dc27a000 00000000dc27e000 1 00000000dc27e000 00000000dc283000 1 00000000dc283000 00000000dc284000 1 00000000dc284000 00000000dc2a2000 1 00000000dc2a2000 00000000dc2a6000 1 00000000dc2a6000 00000000dd163000 2 00000000dd163000 00000000dd2a8000 1 00000000dd2a8000 00000000dd42a000 4 00000000dd42a000 00000000dd83e000 1 00000000dd83e000 00000000de38b000 1 00000000de38b000 00000000de430000 1 00000000de430000 00000000de733000 1 00000000de733000 00000000de74f000 1 00000000de74f000 00000000de770000 1 00000000de770000 00000000de77d000 1 00000000de77d000 00000000de783000 1 00000000de783000 00000000de78b000 1 00000000de78b000 00000000de7a4000 1 00000000de7a4000 00000000de7b4000 1 00000000de7b4000 00000000de7c9000 1 00000000de7c9000 00000000de7e0000 1 00000000de7e0000 00000000deff9000 1 00000000deff9000 00000000df000000 1 0000000100000000 000000021f380000 2 00000000000a0000 0000000000100000 2 00000000df000000 00000000e0000000 2 00000000f8000000 00000000fc000000 2 00000000fd000000 0000000100000000
2019-12-01 14:06:30 +01:00
cinap_lenrek d32e5d130c sd53c8xx: fix the driver for amd64, fix alignment/padding issues, fix freechain handling 2019-11-24 21:56:54 +01:00
cinap_lenrek 44615fba43 sdiahci: implement reset timeout for ahciencreset(), make blink() never block, fix map[] access in ledkproc()
Ori_B reports that his controller gets stuck in the ahciencreset()
wait loop. so we implement a 1000 ms timeout. we replace delay()
with esleep() as we are always called from the ledkproc().

blink() could enter infinite delay loop as well, so instead of
waiting for the message to get transmitted we exit making it
non-blocking (we will get called again anyway).

the access to the controller map[] was wrong in ledkproc(). the
index is the controller number, not the drive number!
2019-11-17 21:19:55 +01:00
cinap_lenrek 521a0b336c bootrc: for wireless netbooting, set the WPA/WPA2 preshard key with wpapsk=password boot parameter
this allows automatic netbooting without password prompt
for the wirelss network.
2019-11-17 19:04:38 +01:00
cinap_lenrek b638c7753d devip: use the routing table for local source ip address selection
when making outgoing connections, the source ip was selected
by just iterating from the first to the last interface and
trying each local address until a route was found. the result
was kind of hard to predict as it depends on the interface
order.

this change replaces the algorithm with the route lookup algorithm
that we already have which takes more specific desination and
source prefixes into account. so the order of interfaces does
not matter anymore.
2019-11-10 19:50:46 +01:00
cinap_lenrek 82d04a4e63 bcm: fix software cursor avoidance for loadimage() case (thanks bitmapper) 2019-10-27 23:51:11 +01:00
cinap_lenrek e38f75fc45 ether82563: fix multicast for i210
MTA has 128 entries, according to section 8.10.15 in the datasheet.
this fixes ipv6 in apu2 which has 3x i210 (8086/157b).
2019-10-11 21:38:12 +02:00
cinap_lenrek db911d4fef sdiahci: force Hudson SATA Controller to AHCI mode 2019-10-08 13:53:57 +02:00
cinap_lenrek c0f464b98f pc: move low-level allocation details out of mmu.c into memory.c rampage() function 2019-10-02 01:01:34 +02:00
cinap_lenrek 0ee738ef8c vgai81x: use vmap() for uncached access to cursor data instead of manipulating kernel page table
on 386, the kernel memory region is mapped using huge 4MB pages
(when supported by the cpu). so the uncached pte manipulation
does not work to map the cursor data with uncached attribute.

instead, we allocate a memory page using newpage() and map
it globally using vmap(), which maps it uncached.
2019-10-02 00:58:46 +02:00
cinap_lenrek 490c3d87cb usbxhci: fix endpoint stall recovery, handle Ep.clrhalt flag
after issuing CR_RESETEP command, we have to invalidate
the endpoints output context buffer so that the halted/error
status reflects the new state. not doing so resulted in
the halted state to be stuck and we continued issuing
endpoint reset commands when we where already recovered.

handle the devusb Ep.clrhalt flag from devusb that userspace
uses to force a endpoint reset on the next transaction.
2019-09-22 18:51:41 +02:00
cinap_lenrek 5993760e14 devip: fix permission checking
permission checking had the "other" and "owner" bits swapped plus incoming
connections where always owned by "network" instead of the owner of
the listening connection. also, ipwstat() was not effective as the uid
strings where not parsed.

this fixes the permission checks for data/ctl/err file and makes incoming
connections inherit the owner from the listening connection.

we also allow ipwstat() to change ownership to the commonuser() or anyone
if we are eve.

we might have to add additional restrictions for none at a later point...
2019-09-21 23:28:37 +02:00
cinap_lenrek b56909157f bootrc: unmount devip *before* starting factotum
we want devip to get reattached after hostowner has been written. factotum
already handles this with a private authdial() routine that mounts devip
when it is not present. so we detach devmnt before starting factotum,
and attach once factotum finishes.
2019-09-21 18:48:14 +02:00
cinap_lenrek 5b7d8e1f6f bootrc: remount devip after /dev/hostowner has been written by factotum
devip remembers the attach uname so after we set hostowner we
remount devip so future connections have the right owner.
2019-09-21 18:11:52 +02:00
cinap_lenrek 12fa017f3f devproc: fix fishy locking in proctext(), check proc validity, static functions
the locking in proctext() is wrong. we have to acquire Proc.seglock
when reading segments from Proc.seg[] as segments do not
have a private freelist and can therefore be reused for other
data structures.

once we have Proc.seglock acquired, check that the process pid
is still valid so we wont accidentally read some other processes
segments. (for both proctext() and procctlmemio()). this also
should give better error message to distinguish the case when
the process did segdetach() the segment in question before we
could acquire Proc.seglock.

declare private functions as static.
2019-09-21 16:36:40 +02:00
cinap_lenrek c45458b929 devproc: move proctab() call after Qnotepg special case in procwrite() 2019-09-19 02:24:23 +02:00
cinap_lenrek 24d1fbde27 kernel: simplify pgrpnote(); moving the note string copying to procwrite()
keeps handling of devproc's note and notepg files similar and in the
same place and reduces stack usage.
2019-09-19 02:07:46 +02:00
cinap_lenrek fc4bfd57d2 bcm64: add addarchfile() prototype to fns.h (for qeed) 2019-09-15 04:53:45 +02:00
cinap_lenrek acab8881bc bcm64: enter page tables in mmutop *AFTER* switching asid in mmuswitch()
there was a small window between modifying mmutop and switching the
asid where the core could bring in the new entries under the old asid
into the tlb due to speculation / prefetching.

this change moves the entering of the page tables into mmutop after
setttbr() to prevent this scenario.

due to us switching to the resereved asid 0 on procsave()->putasid(),
the only asid that could have potentially been poisoned would be asid 0
which does not have any user mappings. so this did not show any noticable
effect.
2019-09-14 14:02:34 +02:00
cinap_lenrek 481a4c75fd usbehci: silence "param declared but not used" compiler warning in itdinit()/sitdinit() 2019-09-09 16:58:45 +02:00
cinap_lenrek 7de7444c6e sdide: silence compiler warning in atadebug() 2019-09-09 16:56:01 +02:00
cinap_lenrek 62eec43340 kernel: clear FPillegal in pexit() and before pprint()
pexit() and pprint() can get called outside of a syscall
(from procctl()) with a process that is in active note
handling and require floating point in the kernel on amd64
for aesni (devtls).
2019-09-08 19:02:01 +02:00
cinap_lenrek 6ad06b36b2 devproc: restore psstate info string in procstopwait() 2019-09-08 18:53:12 +02:00
cinap_lenrek 0cb4115b82 kernel: get rid of tmperrbuf and use syserrstr swapping instead in namec() 2019-09-04 02:44:39 +02:00
cinap_lenrek 6aa7ebcf49 kernel: make exec clear errstr, stop side-channels and truncate on utf8 boundary
make exec() clear the per process error string
to avoid spurious errors and confusion.

the errstr() syscall used to always swap the
maximum buffer size with memmove(), which is
problematic as this gives access to the garbage
beyond the NUL byte. worse, newproc(), werrstr()
and rerrstr() only clear the first byte of the
input buffer. so random stack rubble could be
leaked across processes.

we change the errstr() syscall to not copy
beyond the NUL byte.

the manpage also documents that errstr() should
truncate on a utf8 boundary so we use utfecpy()
to ensure proper NUL termination.
2019-09-04 02:40:41 +02:00
cinap_lenrek e4a57c8b8a bcm64: enable devgpio in kernel configuration (thanks qeed) 2019-09-02 19:38:44 +02:00
cinap_lenrek 7bb1a9a185 pc64: map kernel text readonly and everything else no-execute
the idea is to catch bugs and make kernel exploitation
harder by mapping the kernel text section readonly
and everything else no-execute.

l.s maps the KZERO address space using 2MB pages so
to get the 4K granularity for the text section we use
the new ptesplit() function to split that mapping up.

we need to set EFER no-execute enable bit early
in apbootstrap so secondary application processors
will understand the NX bit in our shared kernel page
tables. also APBOOTSTRAP needs to be kept executable.

rebootjump() needs to mark REBOOTADDR page executable.
2019-08-29 07:35:22 +02:00
cinap_lenrek d9fec3c70a kernel: prohibit changing cache attributes (SG_CACHED|SG_DEVICE) in segattach(), set SG_RONLY in data2txt()
the user should not be able to change the cache
attributes for a segment in segattach() as this
can cause the same memory to be mapped with
conflicting attributes in the cache.

SG_TEXT should always be mapped with SG_RONLY
attribute. so fix data2txt() to follow the rules.
2019-08-27 06:16:20 +02:00
cinap_lenrek d25ca13ed8 kernel: make user stack segment non-executable 2019-08-27 04:04:46 +02:00
cinap_lenrek 1e773c97e7 pc64: implement NX bit discovery, map kernel mappings no-execute 2019-08-27 03:55:12 +02:00
cinap_lenrek 49411b2ca1 kernel: catch execution read fault on SG_NOEXEC segment (for mips) 2019-08-27 03:48:51 +02:00
cinap_lenrek 2149600d12 kernel: catch execution read fault on SG_NOEXEC segment
fault() now has an additional pc argument that is
used to detect fault on a non-executable segment.
that is, we check on read fault if the segment
has the SG_NOEXEC attribute and the program counter
is within faulting page.
2019-08-27 03:47:18 +02:00
cinap_lenrek 128ea44a89 kernel: expose no execute bit to portable mmu code as SG_NOEXEC / PTENOEXEC, add PTECACHED bits
a portable SG_NOEXEC segment attribute was added to allow
non-executable (physical) segments. which will set the
PTENOEXEC bits for putmmu().

in the future, this can be used to make non-executable
stack / bss segments.

the SG_DEVICE attribute was added to distinguish between
mmio regions and uncached memory. only matterns on arm64.

on arm, theres the issue that PTEUNCACHED would have
no bits set when using the hardware bit definitions.
this is the reason bcm, kw, teg2 and omap kernels use
arteficial PTE constants. on zynq, the XN bit was used
as a hack to give PTEUNCACHED a non-zero value and when
the bit is clear then cache attributes where added to
the pte.

to fix this, PTECACHED constant was added.

the portable mmu code in fault.c will now explicitely set
PTECACHED bits for cached memory and PTEUNCACHED for
uncached memory. that way the hardware bit definitions
can be used everywhere.
2019-08-26 22:34:38 +02:00
cinap_lenrek 51cfe763a4 emmc: 50MHz highspeed support (from richard miller) 2019-08-25 20:02:53 +02:00
cinap_lenrek a8c50a7943 bcm64: replace emmc2 driver with richard millers sdhc driver
the new driver supports 50MHz highspeed bus mode
and uses ADMA instead of SDMA.
2019-08-25 18:45:29 +02:00
cinap_lenrek bcf988aff1 bcm64: deal with discontinuous memory regions, avoid virtual memory aliasing, implement vmap() proper
on the 2GB and 4GB raspberry pi 4 variants, there are two
memory regions for ram:

[0x00000000..0x3e600000)
[0x40000000..0xfc000000)

the framebuffer is somewhere at the end of the first
GB of memory.

to handle these, we append the region base and limit
of the second region to *maxmem= like:

*maxmem=0x3e600000 0x40000000 0xfc000000

the mmu code has been changed to have non-existing
ram unmapped and mmukmap() now uses small 64K pages
instead of 512GB pages to avoid aliasing (framebuffer).

the VIRTPCI mapping has been removed as we now have
a proper vmap() implementation which assigns vritual
addresses automatically.
2019-08-23 21:39:20 +02:00