This commit is contained in:
cinap_lenrek 2019-04-11 13:54:03 +02:00
commit f4f19cdf1a
32 changed files with 627 additions and 327 deletions

View file

@ -24,7 +24,7 @@ setkernur(Ureg* ureg, Proc* p)
{
ureg->pc = p->sched.pc;
ureg->sp = p->sched.sp+4;
ureg->r14 = PTR2UINT(sched);
ureg->r14 = (uintptr)sched;
}
/*
@ -95,8 +95,8 @@ linkproc(void)
void
kprocchild(Proc *p, void (*func)(void*), void *arg)
{
p->sched.pc = PTR2UINT(linkproc);
p->sched.sp = PTR2UINT(p->kstack+KSTACK);
p->sched.pc = (uintptr)linkproc;
p->sched.sp = (uintptr)p->kstack+KSTACK;
p->kpfun = func;
p->kparg = arg;

View file

@ -172,3 +172,59 @@ archinit(void)
addarchfile("cputype", 0444, cputyperead, nil);
addarchfile("cputemp", 0444, cputempread, nil);
}
void
uartconsinit(void)
{
extern PhysUart *physuart[];
char *p, *cmd;
Uart *uart;
int i, n;
if((p = getconf("console")) == nil)
return;
i = strtoul(p, &cmd, 0);
if(p == cmd)
return;
/* we only have two possible uarts, the pl011 and aux */
for(n = 0; physuart[n] != nil; n++)
;
if(i < 0 || i >= n)
return;
uart = physuart[i]->pnp();
if(!uart->enabled)
(*uart->phys->enable)(uart, 0);
uartctl(uart, "l8 pn s1");
if(*cmd != '\0')
uartctl(uart, cmd);
consuart = uart;
uart->console = 1;
}
void
okay(int on)
{
static int first;
static int okled, polarity;
char *p;
if(!first++){
p = getconf("bcm2709.disk_led_gpio");
if(p == nil)
p = getconf("bcm2708.disk_led_gpio");
if(p != nil)
okled = strtol(p, 0, 0);
else
okled = 'v';
p = getconf("bcm2709.disk_led_active_low");
if(p == nil)
p = getconf("bcm2708.disk_led_active_low");
polarity = (p == nil || *p == '1');
if(okled != 'v')
gpiosel(okled, Output);
}
if(okled == 'v')
vgpset(0, on);
else if(okled != 0)
gpioout(okled, on^polarity);
}

View file

@ -100,13 +100,13 @@ static u32int *dmaregs = (u32int*)DMAREGS;
uintptr
dmaaddr(void *va)
{
return soc.busdram | (PTR2UINT(va) & ~KSEGM);
return soc.busdram | (PADDR(va) - PHYSDRAM);
}
static uintptr
dmaioaddr(void *va)
{
return soc.busio | (PTR2UINT(va) & ~VIRTIO);
return soc.busio | ((uintptr)va - VIRTIO);
}
static void

View file

@ -131,14 +131,9 @@ extern void kexit(Ureg*);
#define kmapinval()
#define countpagerefs(a, b)
#define PTR2UINT(p) ((uintptr)(p))
#define UINT2PTR(i) ((void*)(i))
#define waserror() (up->nerrlab++, setlabel(&up->errlab[up->nerrlab-1]))
#define KADDR(pa) UINT2PTR(KZERO | ((uintptr)(pa) & ~KSEGM))
#define PADDR(va) PTR2UINT(PHYSDRAM | ((uintptr)(va) & ~KSEGM))
#define DMAADDR(va) PTR2UINT(BUSDRAM | ((uintptr)(va) & ~KSEGM))
#define DMAIO(va) PTR2UINT(BUSIO | ((uintptr)(va) & ~VIRTIO))
#define KADDR(pa) ((void*)(KZERO | ((uintptr)(pa) & ~KSEGM)))
#define PADDR(va) (PHYSDRAM | ((uintptr)(va) & ~KSEGM))
#define MASK(v) ((1UL << (v)) - 1) /* mask `v' bits wide */

View file

@ -11,6 +11,7 @@ enum {
IRQi2c = 53,
IRQspi = 54,
IRQsdhost = 56,
IRQuart = 57,
IRQmmc = 62,
IRQbasic = 64,

166
sys/src/9/bcm/irq.c Normal file
View file

@ -0,0 +1,166 @@
#include "u.h"
#include "../port/lib.h"
#include "mem.h"
#include "dat.h"
#include "fns.h"
#include "io.h"
#include "ureg.h"
#include "../port/error.h"
#define INTREGS (VIRTIO+0xB200)
enum {
Fiqenable = 1<<7,
Localtimerint = 0x40,
Localmboxint = 0x50,
Localintpending = 0x60,
};
/*
* interrupt control registers
*/
typedef struct Intregs Intregs;
struct Intregs {
u32int ARMpending;
u32int GPUpending[2];
u32int FIQctl;
u32int GPUenable[2];
u32int ARMenable;
u32int GPUdisable[2];
u32int ARMdisable;
};
typedef struct Vctl Vctl;
struct Vctl {
Vctl *next;
int irq;
u32int *reg;
u32int mask;
void (*f)(Ureg*, void*);
void *a;
};
static Lock vctllock;
static Vctl *vctl[MAXMACH], *vfiq;
void
intrcpushutdown(void)
{
u32int *enable;
if(soc.armlocal == 0)
return;
enable = (u32int*)(ARMLOCAL + Localtimerint) + m->machno;
*enable = 0;
if(m->machno){
enable = (u32int*)(ARMLOCAL + Localmboxint) + m->machno;
*enable = 1;
}
}
void
intrsoff(void)
{
Intregs *ip;
int disable;
ip = (Intregs*)INTREGS;
disable = ~0;
ip->GPUdisable[0] = disable;
ip->GPUdisable[1] = disable;
ip->ARMdisable = disable;
ip->FIQctl = 0;
}
/*
* called by trap to handle irq interrupts.
* returns true iff a clock interrupt, thus maybe reschedule.
*/
int
irq(Ureg* ureg)
{
Vctl *v;
int clockintr;
clockintr = 0;
for(v = vctl[m->machno]; v != nil; v = v->next)
if((*v->reg & v->mask) != 0){
coherence();
v->f(ureg, v->a);
coherence();
if(v->irq == IRQclock || v->irq == IRQcntps || v->irq == IRQcntpns)
clockintr = 1;
}
return clockintr;
}
/*
* called direct from lexception.s to handle fiq interrupt.
*/
void
fiq(Ureg *ureg)
{
Vctl *v;
v = vfiq;
if(v == nil)
panic("cpu%d: unexpected item in bagging area", m->machno);
m->intr++;
ureg->pc -= 4;
coherence();
v->f(ureg, v->a);
coherence();
}
void
irqenable(int irq, void (*f)(Ureg*, void*), void* a)
{
Vctl *v;
Intregs *ip;
u32int *enable;
int cpu;
ip = (Intregs*)INTREGS;
if((v = xalloc(sizeof(Vctl))) == nil)
panic("irqenable: no mem");
cpu = 0;
v->irq = irq;
if(irq >= IRQlocal){
cpu = m->machno;
v->reg = (u32int*)(ARMLOCAL + Localintpending) + cpu;
if(irq >= IRQmbox0)
enable = (u32int*)(ARMLOCAL + Localmboxint) + cpu;
else
enable = (u32int*)(ARMLOCAL + Localtimerint) + cpu;
v->mask = 1 << (irq - IRQlocal);
}else if(irq >= IRQbasic){
enable = &ip->ARMenable;
v->reg = &ip->ARMpending;
v->mask = 1 << (irq - IRQbasic);
}else{
enable = &ip->GPUenable[irq/32];
v->reg = &ip->GPUpending[irq/32];
v->mask = 1 << (irq % 32);
}
v->f = f;
v->a = a;
lock(&vctllock);
if(irq == IRQfiq){
assert((ip->FIQctl & Fiqenable) == 0);
assert((*enable & v->mask) == 0);
vfiq = v;
ip->FIQctl = Fiqenable | irq;
}else{
v->next = vctl[cpu];
vctl[cpu] = v;
if(irq >= IRQmbox0){
if(irq <= IRQmbox3)
*enable |= 1 << (irq - IRQmbox0);
}else if(irq >= IRQlocal)
*enable |= 1 << (irq - IRQlocal);
else
*enable = v->mask;
}
unlock(&vctllock);
}

View file

@ -367,7 +367,7 @@ bootargs(uintptr base)
* of the argument list checked in syscall.
*/
i = oargblen+1;
p = UINT2PTR(STACKALIGN(base + BY2PG - sizeof(Tos) - i));
p = (void*)STACKALIGN(base + BY2PG - sizeof(Tos) - i);
memmove(p, oargb, i);
/*
@ -379,7 +379,7 @@ bootargs(uintptr base)
* not the usual (int argc, char* argv[])
*/
av = (char**)(p - (oargc+1)*sizeof(char*));
ssize = base + BY2PG - PTR2UINT(av);
ssize = base + BY2PG - (uintptr)av;
for(i = 0; i < oargc; i++)
*av++ = (oargv[i] - oargb) + (p - base) + (USTKTOP - BY2PG);
*av = nil;
@ -415,8 +415,8 @@ userinit(void)
/*
* Kernel Stack
*/
p->sched.pc = PTR2UINT(init0);
p->sched.sp = PTR2UINT(p->kstack+KSTACK-sizeof(up->s.args)-sizeof(uintptr));
p->sched.pc = (uintptr)init0;
p->sched.sp = (uintptr)p->kstack+KSTACK-sizeof(up->s.args)-sizeof(uintptr);
p->sched.sp = STACKALIGN(p->sched.sp);
/*
@ -445,7 +445,7 @@ userinit(void)
pg->txtflush = ~0;
segpage(s, pg);
k = kmap(s->map[0]->pages[0]);
memmove(UINT2PTR(VA(k)), initcode, sizeof initcode);
memmove((void*)VA(k), initcode, sizeof initcode);
kunmap(k);
ready(p);
@ -485,7 +485,7 @@ confinit(void)
conf.mem[0].limit = conf.mem[0].base + memsize;
conf.npage = 0;
pa = PADDR(PGROUND(PTR2UINT(end)));
pa = PADDR(PGROUND((uintptr)end));
/*
* we assume that the kernel is at the beginning of one of the

View file

@ -49,6 +49,7 @@ OBJ=\
fpi.$O\
fpiarm.$O\
fpimem.$O\
irq.$O\
main.$O\
mmu.$O\
random.$O\

View file

@ -91,7 +91,7 @@ mmul2empty(Proc* proc, int clear)
l2 = &proc->mmul2;
for(page = *l2; page != nil; page = page->next){
if(clear)
memset(UINT2PTR(page->va), 0, L2size);
memset((void*)page->va, 0, L2size);
l1[page->daddr] = Fault;
l2 = &page->next;
}
@ -241,7 +241,7 @@ putmmu(uintptr va, uintptr pa, Page* page)
m->mmul1hi = L1hi - x;
}
}
pte = UINT2PTR(KADDR(PPN(*l1)));
pte = KADDR(PPN(*l1));
/* protection bits are
* PTERONLY|PTEVALID;
@ -283,7 +283,7 @@ mmuuncache(void* v, usize size)
* Uncache a Section, must already be
* valid in the MMU.
*/
va = PTR2UINT(v);
va = (uintptr)v;
assert(!(va & (1*MiB-1)) && size == 1*MiB);
x = L1X(va);

View file

@ -12,18 +12,8 @@
#include "arm.h"
#define INTREGS (VIRTIO+0xB200)
typedef struct Intregs Intregs;
typedef struct Vctl Vctl;
enum {
Nvec = 8, /* # of vectors at start of lexception.s */
Fiqenable = 1<<7,
Localtimerint = 0x40,
Localmboxint = 0x50,
Localintpending = 0x60,
};
/*
@ -34,31 +24,6 @@ typedef struct Vpage0 {
u32int vtable[Nvec];
} Vpage0;
/*
* interrupt control registers
*/
struct Intregs {
u32int ARMpending;
u32int GPUpending[2];
u32int FIQctl;
u32int GPUenable[2];
u32int ARMenable;
u32int GPUdisable[2];
u32int ARMdisable;
};
struct Vctl {
Vctl *next;
int irq;
u32int *reg;
u32int mask;
void (*f)(Ureg*, void*);
void *a;
};
static Lock vctllock;
static Vctl *vctl[MAXMACH], *vfiq;
static char *trapnames[PsrMask+1] = {
[ PsrMusr ] "user mode",
[ PsrMfiq ] "fiq interrupt",
@ -70,6 +35,7 @@ static char *trapnames[PsrMask+1] = {
[ PsrMsys ] "sys trap",
};
extern int irq(Ureg*);
extern int notify(Ureg*);
/*
@ -102,127 +68,6 @@ trapinit(void)
coherence();
}
void
intrcpushutdown(void)
{
u32int *enable;
if(soc.armlocal == 0)
return;
enable = (u32int*)(ARMLOCAL + Localtimerint) + m->machno;
*enable = 0;
if(m->machno){
enable = (u32int*)(ARMLOCAL + Localmboxint) + m->machno;
*enable = 1;
}
}
void
intrsoff(void)
{
Intregs *ip;
int disable;
ip = (Intregs*)INTREGS;
disable = ~0;
ip->GPUdisable[0] = disable;
ip->GPUdisable[1] = disable;
ip->ARMdisable = disable;
ip->FIQctl = 0;
}
/*
* called by trap to handle irq interrupts.
* returns true iff a clock interrupt, thus maybe reschedule.
*/
static int
irq(Ureg* ureg)
{
Vctl *v;
int clockintr;
clockintr = 0;
for(v = vctl[m->machno]; v != nil; v = v->next)
if((*v->reg & v->mask) != 0){
coherence();
v->f(ureg, v->a);
coherence();
if(v->irq == IRQclock || v->irq == IRQcntps || v->irq == IRQcntpns)
clockintr = 1;
}
return clockintr;
}
/*
* called direct from lexception.s to handle fiq interrupt.
*/
void
fiq(Ureg *ureg)
{
Vctl *v;
v = vfiq;
if(v == nil)
panic("cpu%d: unexpected item in bagging area", m->machno);
m->intr++;
ureg->pc -= 4;
coherence();
v->f(ureg, v->a);
coherence();
}
void
irqenable(int irq, void (*f)(Ureg*, void*), void* a)
{
Vctl *v;
Intregs *ip;
u32int *enable;
int cpu;
ip = (Intregs*)INTREGS;
if((v = xalloc(sizeof(Vctl))) == nil)
panic("irqenable: no mem");
cpu = 0;
v->irq = irq;
if(irq >= IRQlocal){
cpu = m->machno;
v->reg = (u32int*)(ARMLOCAL + Localintpending) + cpu;
if(irq >= IRQmbox0)
enable = (u32int*)(ARMLOCAL + Localmboxint) + cpu;
else
enable = (u32int*)(ARMLOCAL + Localtimerint) + cpu;
v->mask = 1 << (irq - IRQlocal);
}else if(irq >= IRQbasic){
enable = &ip->ARMenable;
v->reg = &ip->ARMpending;
v->mask = 1 << (irq - IRQbasic);
}else{
enable = &ip->GPUenable[irq/32];
v->reg = &ip->GPUpending[irq/32];
v->mask = 1 << (irq % 32);
}
v->f = f;
v->a = a;
lock(&vctllock);
if(irq == IRQfiq){
assert((ip->FIQctl & Fiqenable) == 0);
assert((*enable & v->mask) == 0);
vfiq = v;
ip->FIQctl = Fiqenable | irq;
}else{
v->next = vctl[cpu];
vctl[cpu] = v;
if(irq >= IRQmbox0){
if(irq <= IRQmbox3)
*enable |= 1 << (irq - IRQmbox0);
}else if(irq >= IRQlocal)
*enable |= 1 << (irq - IRQlocal);
else
*enable = v->mask;
}
unlock(&vctllock);
}
static char *
trapname(int psr)
{
@ -560,7 +405,7 @@ callwithureg(void (*fn)(Ureg*))
Ureg ureg;
ureg.pc = getcallerpc(&fn);
ureg.sp = PTR2UINT(&fn);
ureg.sp = (uintptr)&fn;
fn(&ureg);
}

View file

@ -47,7 +47,7 @@ extern PhysUart miniphysuart;
static Uart miniuart = {
.regs = (u32int*)AUXREGS,
.name = "uart0",
.name = "uart1",
.freq = 250000000,
.baud = 115200,
.phys = &miniphysuart,
@ -100,7 +100,7 @@ enable(Uart *uart, int ie)
ap[MuCntl] = TxEn|RxEn;
baud(uart, uart->baud);
if(ie){
intrenable(IRQaux, interrupt, uart, 0, "uart");
intrenable(IRQaux, interrupt, uart, 0, uart->name);
ap[MuIer] = RxIen|TxIen;
}else
ap[MuIer] = 0;
@ -259,7 +259,7 @@ donothing(Uart*, int)
{
}
void
static void
putc(Uart*, int c)
{
u32int *ap;
@ -272,7 +272,7 @@ putc(Uart*, int c)
;
}
int
static int
getc(Uart*)
{
u32int *ap;
@ -283,38 +283,8 @@ getc(Uart*)
return ap[MuIo] & 0xFF;
}
void
uartconsinit(void)
{
Uart *uart;
int n;
char *p, *cmd;
if((p = getconf("console")) == nil)
return;
n = strtoul(p, &cmd, 0);
if(p == cmd)
return;
switch(n){
default:
return;
case 0:
uart = &miniuart;
break;
}
if(!uart->enabled)
(*uart->phys->enable)(uart, 0);
uartctl(uart, "l8 pn s1");
if(*cmd != '\0')
uartctl(uart, cmd);
consuart = uart;
uart->console = 1;
}
PhysUart miniphysuart = {
.name = "miniuart",
.name = "mini",
.pnp = pnp,
.enable = enable,
.disable = disable,
@ -332,31 +302,3 @@ PhysUart miniphysuart = {
.getc = getc,
.putc = putc,
};
void
okay(int on)
{
static int first;
static int okled, polarity;
char *p;
if(!first++){
p = getconf("bcm2709.disk_led_gpio");
if(p == nil)
p = getconf("bcm2708.disk_led_gpio");
if(p != nil)
okled = strtol(p, 0, 0);
else
okled = 'v';
p = getconf("bcm2709.disk_led_active_low");
if(p == nil)
p = getconf("bcm2708.disk_led_active_low");
polarity = (p == nil || *p == '1');
if(okled != 'v')
gpiosel(okled, Output);
}
if(okled == 'v')
vgpset(0, on);
else if(okled != 0)
gpioout(okled, on^polarity);
}

303
sys/src/9/bcm/uartpl011.c Normal file
View file

@ -0,0 +1,303 @@
/*
* bcm2835 PL011 uart
*/
#include "u.h"
#include "../port/lib.h"
#include "../port/error.h"
#include "mem.h"
#include "dat.h"
#include "fns.h"
#include "io.h"
enum {
DR = 0x00>>2,
RSRECR = 0x04>>2,
FR = 0x18>>2,
TXFE = 1<<7,
RXFF = 1<<6,
TXFF = 1<<5,
RXFE = 1<<4,
BUSY = 1<<3,
ILPR = 0x20>>2,
IBRD = 0x24>>2,
FBRD = 0x28>>2,
LCRH = 0x2c>>2,
WLENM = 3<<5,
WLEN8 = 3<<5,
WLEN7 = 2<<5,
WLEN6 = 1<<5,
WLEN5 = 0<<5,
FEN = 1<<4, /* fifo enable */
STP2 = 1<<3, /* 2 stop bits */
EPS = 1<<2, /* even parity select */
PEN = 1<<1, /* parity enabled */
BRK = 1<<0, /* send break */
CR = 0x30>>2,
CTSEN = 1<<15,
RTSEN = 1<<14,
RTS = 1<<11,
RXE = 1<<9,
TXE = 1<<8,
LBE = 1<<7,
UARTEN = 1<<0,
IFLS = 0x34>>2,
IMSC = 0x38>>2,
TXIM = 1<<5,
RXIM = 1<<4,
RIS = 0x3c>>2,
MIS = 0x40>>2,
ICR = 0x44>>2,
DMACR = 0x48>>2,
ITCR = 0x80>>2,
ITIP = 0x84>>2,
ITOP = 0x88>>2,
TDR = 0x8c>>2,
};
extern PhysUart pl011physuart;
static Uart pl011uart = {
.regs = (u32int*)(VIRTIO+0x201000),
.name = "uart0",
.freq = 250000000,
.baud = 115200,
.phys = &pl011physuart,
};
static Uart*
pnp(void)
{
return &pl011uart;
}
static void
interrupt(Ureg*, void *arg)
{
Uart *uart = arg;
u32int *reg = (u32int*)uart->regs;
coherence();
if((reg[FR] & TXFE) == 0)
uartkick(uart);
while((reg[FR] & RXFE) == 0)
uartrecv(uart, reg[DR] & 0xFF);
coherence();
}
static void
enable(Uart *uart, int ie)
{
u32int *reg = (u32int*)uart->regs;
reg[CR] = UARTEN | RXE | TXE;
if(ie){
intrenable(IRQuart, interrupt, uart, 0, uart->name);
reg[IMSC] = TXIM|RXIM;
} else {
reg[IMSC] = 0;
}
}
static void
disable(Uart *uart)
{
u32int *reg = (u32int*)uart->regs;
reg[IMSC] = 0;
reg[CR] = 0;
}
static void
kick(Uart *uart)
{
u32int *reg = (u32int*)uart->regs;
if(uart->blocked)
return;
coherence();
while((reg[FR] & TXFF) == 0){
if(uart->op >= uart->oe && uartstageoutput(uart) == 0)
break;
reg[DR] = *(uart->op++);
}
coherence();
}
static void
dobreak(Uart *uart, int ms)
{
u32int *reg = (u32int*)uart->regs;
reg[LCRH] |= BRK;
delay(ms);
reg[LCRH] &= ~BRK;
}
static int
baud(Uart *uart, int n)
{
u32int *reg = (u32int*)uart->regs;
if(uart->freq <= 0 || n <= 0)
return -1;
reg[IBRD] = (uart->freq >> 4) / n;
reg[FBRD] = (uart->freq >> 4) % n;
uart->baud = n;
return 0;
}
static int
bits(Uart *uart, int n)
{
u32int *reg = (u32int*)uart->regs;
switch(n){
case 8:
reg[LCRH] = (reg[LCRH] & ~WLENM) | WLEN8;
break;
case 7:
reg[LCRH] = (reg[LCRH] & ~WLENM) | WLEN7;
break;
case 6:
reg[LCRH] = (reg[LCRH] & ~WLENM) | WLEN6;
break;
case 5:
reg[LCRH] = (reg[LCRH] & ~WLENM) | WLEN5;
break;
default:
return -1;
}
uart->bits = n;
return 0;
}
static int
stop(Uart *uart, int n)
{
u32int *reg = (u32int*)uart->regs;
switch(n){
case 1:
reg[LCRH] &= ~STP2;
break;
case 2:
reg[LCRH] |= STP2;
break;
default:
return -1;
}
uart->stop = n;
return 0;
}
static int
parity(Uart *uart, int n)
{
u32int *reg = (u32int*)uart->regs;
switch(n){
case 'n':
reg[LCRH] &= ~PEN;
break;
case 'e':
reg[LCRH] |= EPS | PEN;
break;
case 'o':
reg[LCRH] = (reg[LCRH] & ~EPS) | PEN;
break;
default:
return -1;
}
uart->parity = n;
return 0;
}
static void
modemctl(Uart *uart, int on)
{
uart->modem = on;
}
static void
rts(Uart*, int)
{
}
static long
status(Uart *uart, void *buf, long n, long offset)
{
char *p;
p = malloc(READSTR);
if(p == nil)
error(Enomem);
snprint(p, READSTR,
"b%d\n"
"dev(%d) type(%d) framing(%d) overruns(%d) "
"berr(%d) serr(%d)\n",
uart->baud,
uart->dev,
uart->type,
uart->ferr,
uart->oerr,
uart->berr,
uart->serr
);
n = readstr(offset, buf, n, p);
free(p);
return n;
}
static void
donothing(Uart*, int)
{
}
static void
putc(Uart *uart, int c)
{
u32int *reg = (u32int*)uart->regs;
while((reg[FR] & TXFF) != 0)
;
reg[DR] = c & 0xFF;
}
static int
getc(Uart *uart)
{
u32int *reg = (u32int*)uart->regs;
while((reg[FR] & RXFE) != 0)
;
return reg[DR] & 0xFF;
}
PhysUart pl011physuart = {
.name = "pl011",
.pnp = pnp,
.enable = enable,
.disable = disable,
.kick = kick,
.dobreak = dobreak,
.baud = baud,
.bits = bits,
.stop = stop,
.parity = parity,
.modemctl = donothing,
.rts = rts,
.dtr = donothing,
.status = status,
.fifo = donothing,
.getc = getc,
.putc = putc,
};

View file

@ -149,7 +149,7 @@ vcreq(int tag, void *buf, int vallen, int rsplen)
memmove(prop->data, buf, vallen);
cachedwbinvse(prop, prop->len);
for(;;){
aprop = busaddr? dmaaddr(prop) : PTR2UINT(prop);
aprop = busaddr? dmaaddr(prop) : (uintptr)prop;
vcwrite(ChanProps, aprop);
r = vcread(ChanProps);
if(r == aprop)

View file

@ -24,7 +24,7 @@ setkernur(Ureg* ureg, Proc* p)
{
ureg->pc = p->sched.pc;
ureg->sp = p->sched.sp+4;
ureg->r14 = PTR2UINT(sched);
ureg->r14 = (uintptr)sched;
}
/*
@ -95,8 +95,8 @@ linkproc(void)
void
kprocchild(Proc *p, void (*func)(void*), void *arg)
{
p->sched.pc = PTR2UINT(linkproc);
p->sched.sp = PTR2UINT(p->kstack+KSTACK);
p->sched.pc = (uintptr)linkproc;
p->sched.sp = (uintptr)p->kstack+KSTACK;
p->kpfun = func;
p->kparg = arg;

View file

@ -174,9 +174,6 @@ extern void kexit(Ureg*);
#define getpgcolor(a) 0
#define kmapinval()
#define PTR2UINT(p) ((uintptr)(p))
#define UINT2PTR(i) ((void*)(i))
#define waserror() (up->nerrlab++, setlabel(&up->errlab[up->nerrlab-1]))
/*
@ -195,7 +192,7 @@ extern void kexit(Ureg*);
/*
* These are not good enough.
*/
#define KADDR(pa) UINT2PTR(KZERO|((uintptr)(pa)))
#define PADDR(va) PTR2UINT(((uintptr)(va)) & ~KSEGM)
#define KADDR(pa) ((void*)(KZERO|((uintptr)(pa))))
#define PADDR(va) (((uintptr)(va)) & ~KSEGM)
#define MASK(v) ((1UL << (v)) - 1) /* mask `v' bits wide */

View file

@ -460,7 +460,7 @@ bootargs(uintptr base)
* of the argument list checked in syscall.
*/
i = oargblen+1;
p = UINT2PTR(STACKALIGN(base + BY2PG - sizeof(up->s.args) - i));
p = (void*)(STACKALIGN(base + BY2PG - sizeof(up->s.args) - i));
memmove(p, oargb, i);
/*
@ -473,7 +473,7 @@ bootargs(uintptr base)
* unused so it doesn't matter (at the moment...).
*/
av = (char**)(p - (oargc+2)*sizeof(char*));
ssize = base + BY2PG - PTR2UINT(av);
ssize = base + BY2PG - (uintptr)av;
*av++ = (char*)oargc;
for(i = 0; i < oargc; i++)
*av++ = (oargv[i] - oargb) + (p - base) + (USTKTOP - BY2PG);
@ -515,8 +515,8 @@ userinit(void)
/*
* Kernel Stack
*/
p->sched.pc = PTR2UINT(init0);
p->sched.sp = PTR2UINT(p->kstack+KSTACK-sizeof(up->s.args)-sizeof(uintptr));
p->sched.pc = (uintptr)init0;
p->sched.sp = (uintptr)p->kstack+KSTACK-sizeof(up->s.args)-sizeof(uintptr);
p->sched.sp = STACKALIGN(p->sched.sp);
/*
@ -545,7 +545,7 @@ userinit(void)
pg->txtflush = ~0;
segpage(s, pg);
k = kmap(s->map[0]->pages[0]);
memmove(UINT2PTR(VA(k)), initcode, sizeof initcode);
memmove((void*)VA(k), initcode, sizeof initcode);
kunmap(k);
ready(p);
@ -578,7 +578,7 @@ confinit(void)
memmove(conf.mem, sheevamem, sizeof(sheevamem));
conf.npage = 0;
pa = PADDR(PGROUND(PTR2UINT(end)));
pa = PADDR(PGROUND((uintptr)end));
/*
* we assume that the kernel is at the beginning of one of the

View file

@ -154,7 +154,7 @@ mmul2empty(Proc* proc, int clear)
l2 = &proc->mmul2;
for(page = *l2; page != nil; page = page->next){
if(clear)
memset(UINT2PTR(page->va), 0, BY2PG);
memset((void*)page->va, 0, BY2PG);
l1[page->daddr] = Fault;
l2 = &page->next;
}
@ -301,7 +301,7 @@ putmmu(uintptr va, uintptr pa, Page* page)
else{
pg = up->mmul2cache;
up->mmul2cache = pg->next;
memset(UINT2PTR(pg->va), 0, BY2PG);
memset((void*)pg->va, 0, BY2PG);
}
pg->daddr = x;
pg->next = up->mmul2;
@ -323,7 +323,7 @@ putmmu(uintptr va, uintptr pa, Page* page)
m->mmul1hi = x;
}
}
pte = UINT2PTR(KADDR(PPN(*l1)));
pte = (void*)KADDR(PPN(*l1));
//print("pte %#p index %ld %#ux\n", pte, L2X(va), *(pte+L2X(va)));
/* protection bits are
@ -372,7 +372,7 @@ mmuuncache(void* v, usize size)
* Uncache a Section, must already be
* valid in the MMU.
*/
va = PTR2UINT(v);
va = (uintptr)v;
assert(!(va & (1*MiB-1)) && size == 1*MiB);
x = L1X(va);
@ -459,7 +459,7 @@ vmap(uintptr pa, usize size)
* will fail.
*/
if(pa+size < 4*MiB)
return UINT2PTR(kseg0|pa);
return (void*)(kseg0|pa);
osize = size;
o = pa & (BY2PG-1);
@ -473,7 +473,7 @@ vmap(uintptr pa, usize size)
panic("vmap(%#p, %ld) called from %#p: mmukmap fails %#p",
pa+o, osize, getcallerpc(&pa), pae);
return UINT2PTR(va+o);
return (void*)(va+o);
}
/* from 386 */

View file

@ -41,7 +41,7 @@ noted(Ureg* cur, uintptr arg0)
nf = up->ureg;
/* sanity clause */
if(!okaddr(PTR2UINT(nf), sizeof(NFrame), 0)){
if(!okaddr((uintptr)nf, sizeof(NFrame), 0)){
qunlock(&up->debug);
pprint("bad ureg in noted %#p\n", nf);
pexit("Suicide", 0);
@ -77,8 +77,8 @@ noted(Ureg* cur, uintptr arg0)
nf->arg1 = nf->msg;
nf->arg0 = &nf->ureg;
nf->ip = 0;
cur->sp = PTR2UINT(nf);
cur->r0 = PTR2UINT(nf->arg0);
cur->sp = (uintptr)nf;
cur->r0 = (uintptr)nf->arg0;
break;
default:
up->lastnote.flag = NDebug;
@ -140,7 +140,7 @@ notify(Ureg* ureg)
qunlock(&up->debug);
pexit(n->msg, n->flag != NDebug);
}
if(!okaddr(PTR2UINT(up->notify), 1, 0)){
if(!okaddr((uintptr)up->notify, 1, 0)){
qunlock(&up->debug);
pprint("suicide: notify function address %#p\n", up->notify);
pexit("Suicide", 0);
@ -153,7 +153,7 @@ notify(Ureg* ureg)
pexit("Suicide", 0);
}
nf = UINT2PTR(sp);
nf = (void*)sp;
memmove(&nf->ureg, ureg, sizeof(Ureg));
nf->old = up->ureg;
up->ureg = nf;
@ -163,8 +163,8 @@ notify(Ureg* ureg)
nf->ip = 0;
ureg->sp = sp;
ureg->pc = PTR2UINT(up->notify);
ureg->r0 = PTR2UINT(nf->arg0);
ureg->pc = (uintptr)up->notify;
ureg->r0 = (uintptr)nf->arg0;
up->notified = 1;
up->nnote--;

View file

@ -602,7 +602,7 @@ callwithureg(void (*fn)(Ureg*))
Ureg ureg;
ureg.pc = getcallerpc(&fn);
ureg.sp = PTR2UINT(&fn);
ureg.sp = (uintptr)&fn;
fn(&ureg);
}

View file

@ -24,7 +24,7 @@ setkernur(Ureg* ureg, Proc* p)
{
ureg->pc = p->sched.pc;
ureg->sp = p->sched.sp+4;
ureg->r14 = PTR2UINT(sched);
ureg->r14 = (uintptr)sched;
}
/*
@ -95,8 +95,8 @@ linkproc(void)
void
kprocchild(Proc *p, void (*func)(void*), void *arg)
{
p->sched.pc = PTR2UINT(linkproc);
p->sched.sp = PTR2UINT(p->kstack+KSTACK);
p->sched.pc = (uintptr)linkproc;
p->sched.sp = (uintptr)p->kstack+KSTACK;
p->kpfun = func;
p->kparg = arg;

View file

@ -165,13 +165,10 @@ extern void kexit(Ureg*);
#define getpgcolor(a) 0
#define kmapinval()
#define PTR2UINT(p) ((uintptr)(p))
#define UINT2PTR(i) ((void*)(i))
#define waserror() (up->nerrlab++, setlabel(&up->errlab[up->nerrlab-1]))
#define KADDR(pa) UINT2PTR(KZERO | ((uintptr)(pa) & ~KSEGM))
#define PADDR(va) PTR2UINT(PHYSDRAM | ((uintptr)(va) & ~KSEGM))
#define KADDR(pa) ((void*)(KZERO | ((uintptr)(pa) & ~KSEGM)))
#define PADDR(va) (PHYSDRAM | ((uintptr)(va) & ~KSEGM))
#define wave(c) *(ulong *)PHYSCONS = (c)

View file

@ -447,7 +447,7 @@ bootargs(uintptr base)
* of the argument list checked in syscall.
*/
i = oargblen+1;
p = UINT2PTR(STACKALIGN(base + BY2PG - sizeof(up->s.args) - i));
p = (void*)(STACKALIGN(base + BY2PG - sizeof(up->s.args) - i));
memmove(p, oargb, i);
/*
@ -460,7 +460,7 @@ bootargs(uintptr base)
* unused so it doesn't matter (at the moment...).
*/
av = (char**)(p - (oargc+2)*sizeof(char*));
ssize = base + BY2PG - PTR2UINT(av);
ssize = base + BY2PG - (uintptr)av;
*av++ = (char*)oargc;
for(i = 0; i < oargc; i++)
*av++ = (oargv[i] - oargb) + (p - base) + (USTKTOP - BY2PG);
@ -502,8 +502,8 @@ userinit(void)
/*
* Kernel Stack
*/
p->sched.pc = PTR2UINT(init0);
p->sched.sp = PTR2UINT(p->kstack+KSTACK-sizeof(up->s.args)-sizeof(uintptr));
p->sched.pc = (uintptr)init0;
p->sched.sp = (uintptr)p->kstack+KSTACK-sizeof(up->s.args)-sizeof(uintptr);
p->sched.sp = STACKALIGN(p->sched.sp);
/*
@ -532,7 +532,7 @@ userinit(void)
pg->txtflush = ~0;
segpage(s, pg);
k = kmap(s->map[0]->pages[0]);
memmove(UINT2PTR(VA(k)), initcode, sizeof initcode);
memmove((void*)VA(k), initcode, sizeof initcode);
kunmap(k);
ready(p);
@ -596,7 +596,7 @@ confinit(void)
memmove(conf.mem, omapmem, sizeof(omapmem));
conf.npage = 0;
pa = PADDR(PGROUND(PTR2UINT(end)));
pa = PADDR(PGROUND((uintptr)end));
/*
* we assume that the kernel is at the beginning of one of the

View file

@ -138,7 +138,7 @@ mmul2empty(Proc* proc, int clear)
l2 = &proc->mmul2;
for(page = *l2; page != nil; page = page->next){
if(clear)
memset(UINT2PTR(page->va), 0, BY2PG);
memset((void*)page->va, 0, BY2PG);
l1[page->daddr] = Fault;
l2 = &page->next;
}
@ -282,7 +282,7 @@ putmmu(uintptr va, uintptr pa, Page* page)
else{
pg = up->mmul2cache;
up->mmul2cache = pg->next;
memset(UINT2PTR(pg->va), 0, BY2PG);
memset((void*)pg->va, 0, BY2PG);
}
pg->daddr = x;
pg->next = up->mmul2;
@ -302,7 +302,7 @@ putmmu(uintptr va, uintptr pa, Page* page)
m->mmul1hi = x;
}
}
pte = UINT2PTR(KADDR(PPN(*l1)));
pte = KADDR(PPN(*l1));
//print("pte %#p index %ld was %#ux\n", pte, L2X(va), *(pte+L2X(va)));
/* protection bits are
@ -349,7 +349,7 @@ mmuuncache(void* v, usize size)
* Uncache a Section, must already be
* valid in the MMU.
*/
va = PTR2UINT(v);
va = (uintptr)v;
assert(!(va & (1*MiB-1)) && size == 1*MiB);
x = L1X(va);
@ -433,7 +433,7 @@ vmap(uintptr pa, usize size)
* will fail.
*/
if(pa+size < 4*MiB)
return UINT2PTR(kseg0|pa);
return (void*)(kseg0|pa);
osize = size;
o = pa & (BY2PG-1);
@ -447,7 +447,7 @@ vmap(uintptr pa, usize size)
panic("vmap(%#p, %ld) called from %#p: mmukmap fails %#p",
pa+o, osize, getcallerpc(&pa), pae);
return UINT2PTR(va+o);
return (void*)(va+o);
}
/* from 386 */

View file

@ -41,7 +41,7 @@ noted(Ureg* cur, uintptr arg0)
nf = up->ureg;
/* sanity clause */
if(!okaddr(PTR2UINT(nf), sizeof(NFrame), 0)){
if(!okaddr((uintptr)nf, sizeof(NFrame), 0)){
qunlock(&up->debug);
pprint("bad ureg in noted %#p\n", nf);
pexit("Suicide", 0);
@ -77,8 +77,8 @@ noted(Ureg* cur, uintptr arg0)
nf->arg1 = nf->msg;
nf->arg0 = &nf->ureg;
nf->ip = 0;
cur->sp = PTR2UINT(nf);
cur->r0 = PTR2UINT(nf->arg0);
cur->sp = (uintptr)nf;
cur->r0 = (uintptr)nf->arg0;
break;
default:
up->lastnote.flag = NDebug;
@ -140,7 +140,7 @@ notify(Ureg* ureg)
qunlock(&up->debug);
pexit(n->msg, n->flag != NDebug);
}
if(!okaddr(PTR2UINT(up->notify), 1, 0)){
if(!okaddr((uintptr)up->notify, 1, 0)){
qunlock(&up->debug);
pprint("suicide: notify function address %#p\n", up->notify);
pexit("Suicide", 0);
@ -153,7 +153,7 @@ notify(Ureg* ureg)
pexit("Suicide", 0);
}
nf = UINT2PTR(sp);
nf = (void*)sp;
memmove(&nf->ureg, ureg, sizeof(Ureg));
nf->old = up->ureg;
up->ureg = nf;
@ -163,8 +163,8 @@ notify(Ureg* ureg)
nf->ip = 0;
ureg->sp = sp;
ureg->pc = PTR2UINT(up->notify);
ureg->r0 = PTR2UINT(nf->arg0);
ureg->pc = (uintptr)up->notify;
ureg->r0 = (uintptr)nf->arg0;
up->notified = 1;
up->nnote--;

View file

@ -644,7 +644,7 @@ callwithureg(void (*fn)(Ureg*))
Ureg ureg;
ureg.pc = getcallerpc(&fn);
ureg.sp = PTR2UINT(&fn);
ureg.sp = (uintptr)&fn;
fn(&ureg);
}

View file

@ -114,7 +114,7 @@ syscallfmt(ulong syscallno, uintptr pc, va_list list)
a = va_arg(list, char*);
fmtuserstring(&fmt, a, "");
argv = va_arg(list, char**);
evenaddr(PTR2UINT(argv));
evenaddr((uintptr)argv);
for(;;){
validaddr((uintptr)argv, sizeof(char**), 0);
a = *(char **)argv;

View file

@ -24,7 +24,7 @@ setkernur(Ureg* ureg, Proc* p)
{
ureg->pc = p->sched.pc;
ureg->sp = p->sched.sp+4;
ureg->r14 = PTR2UINT(sched);
ureg->r14 = (uintptr)sched;
}
/*
@ -95,8 +95,8 @@ linkproc(void)
void
kprocchild(Proc *p, void (*func)(void*), void *arg)
{
p->sched.pc = PTR2UINT(linkproc);
p->sched.sp = PTR2UINT(p->kstack+KSTACK);
p->sched.pc = (uintptr)linkproc;
p->sched.sp = (uintptr)p->kstack+KSTACK;
p->kpfun = func;
p->kparg = arg;

View file

@ -217,12 +217,9 @@ extern void kexit(Ureg*);
#define getpgcolor(a) 0
#define kmapinval()
#define PTR2UINT(p) ((uintptr)(p))
#define UINT2PTR(i) ((void*)(i))
#define waserror() (up->nerrlab++, setlabel(&up->errlab[up->nerrlab-1]))
#define KADDR(pa) UINT2PTR(KZERO | ((uintptr)(pa) & ~KSEGM))
#define PADDR(va) PTR2UINT(PHYSDRAM | ((uintptr)(va) & ~KSEGM))
#define KADDR(pa) ((void*)(KZERO | ((uintptr)(pa) & ~KSEGM)))
#define PADDR(va) (PHYSDRAM | ((uintptr)(va) & ~KSEGM))
#define MASK(v) ((1UL << (v)) - 1) /* mask `v' bits wide */

View file

@ -643,7 +643,7 @@ bootargs(uintptr base)
* of the argument list checked in syscall.
*/
i = oargblen+1;
p = UINT2PTR(STACKALIGN(base + BY2PG - sizeof(up->s.args) - i));
p = (void*)(STACKALIGN(base + BY2PG - sizeof(up->s.args) - i));
memmove(p, oargb, i);
/*
@ -656,7 +656,7 @@ bootargs(uintptr base)
* unused so it doesn't matter (at the moment...).
*/
av = (char**)(p - (oargc+2)*sizeof(char*));
ssize = base + BY2PG - PTR2UINT(av);
ssize = base + BY2PG - (uintptr)av;
*av++ = (char*)oargc;
for(i = 0; i < oargc; i++)
*av++ = (oargv[i] - oargb) + (p - base) + (USTKTOP - BY2PG);
@ -698,8 +698,8 @@ userinit(void)
/*
* Kernel Stack
*/
p->sched.pc = PTR2UINT(init0);
p->sched.sp = PTR2UINT(p->kstack+KSTACK-sizeof(up->s.args)-sizeof(uintptr));
p->sched.pc = (uintptr)init0;
p->sched.sp = (uintptr)p->kstack+KSTACK-sizeof(up->s.args)-sizeof(uintptr);
p->sched.sp = STACKALIGN(p->sched.sp);
/*
@ -728,7 +728,7 @@ userinit(void)
pg->txtflush = ~0;
segpage(s, pg);
k = kmap(s->map[0]->pages[0]);
memmove(UINT2PTR(VA(k)), initcode, sizeof initcode);
memmove((void*)VA(k), initcode, sizeof initcode);
kunmap(k);
ready(p);
@ -797,7 +797,7 @@ confinit(void)
memmove(conf.mem, tsmem, sizeof(tsmem));
conf.npage = 0;
pa = PADDR(PGROUND(PTR2UINT(end)));
pa = PADDR(PGROUND((uintptr)end));
/*
* we assume that the kernel is at the beginning of one of the

View file

@ -375,7 +375,7 @@ mmul2empty(Proc* proc, int clear)
l2 = &proc->mmul2;
for(page = *l2; page != nil; page = page->next){
if(clear)
memset(UINT2PTR(page->va), 0, BY2PG);
memset((void*)page->va, 0, BY2PG);
l1[page->daddr] = Fault;
allcache->wbse(l1, sizeof *l1);
l2 = &page->next;
@ -527,7 +527,7 @@ putmmu(uintptr va, uintptr pa, Page* page)
else{
pg = up->mmul2cache;
up->mmul2cache = pg->next;
memset(UINT2PTR(pg->va), 0, BY2PG);
memset((void*)pg->va, 0, BY2PG);
}
pg->daddr = x;
pg->next = up->mmul2;
@ -549,7 +549,7 @@ putmmu(uintptr va, uintptr pa, Page* page)
m->mmul1hi = x;
}
}
pte = UINT2PTR(KADDR(PPN(*l1)));
pte = KADDR(PPN(*l1));
if (Debug) {
iprint("pte %#p index %ld was %#ux\n", pte, L2X(va), *(pte+L2X(va)));
if (*(pte+L2X(va)))
@ -602,7 +602,7 @@ mmuuncache(void* v, usize size)
* Uncache a Section, must already be
* valid in the MMU.
*/
va = PTR2UINT(v);
va = (uintptr)v;
assert(!(va & (1*MiB-1)) && size == 1*MiB);
x = L1X(va);
@ -687,7 +687,7 @@ vmap(uintptr pa, usize size)
* will fail.
*/
if(pa+size < 4*MiB)
return UINT2PTR(kseg0|pa);
return (void*)(kseg0|pa);
osize = size;
o = pa & (BY2PG-1);
@ -701,7 +701,7 @@ vmap(uintptr pa, usize size)
panic("vmap(%#p, %ld) called from %#p: mmukmap fails %#p",
pa+o, osize, getcallerpc(&pa), pae);
return UINT2PTR(va+o);
return (void*)(va+o);
}
/* from 386 */

View file

@ -47,7 +47,7 @@ noted(Ureg* cur, uintptr arg0)
nf = up->ureg;
/* sanity clause */
if(!okaddr(PTR2UINT(nf), sizeof(NFrame), 0)){
if(!okaddr((uintptr)nf, sizeof(NFrame), 0)){
qunlock(&up->debug);
pprint("bad ureg in noted %#p\n", nf);
pexit("Suicide", 0);
@ -83,8 +83,8 @@ noted(Ureg* cur, uintptr arg0)
nf->arg1 = nf->msg;
nf->arg0 = &nf->ureg;
nf->ip = 0;
cur->sp = PTR2UINT(nf);
cur->r0 = PTR2UINT(nf->arg0);
cur->sp = (uintptr)nf;
cur->r0 = (uintptr)nf->arg0;
break;
default:
up->lastnote.flag = NDebug;
@ -146,7 +146,7 @@ notify(Ureg* ureg)
qunlock(&up->debug);
pexit(n->msg, n->flag != NDebug);
}
if(!okaddr(PTR2UINT(up->notify), 1, 0)){
if(!okaddr((uintptr)up->notify, 1, 0)){
qunlock(&up->debug);
pprint("suicide: notify function address %#p\n", up->notify);
pexit("Suicide", 0);
@ -159,7 +159,7 @@ notify(Ureg* ureg)
pexit("Suicide", 0);
}
nf = UINT2PTR(sp);
nf = (void*)sp;
memmove(&nf->ureg, ureg, sizeof(Ureg));
nf->old = up->ureg;
up->ureg = nf;
@ -169,8 +169,8 @@ notify(Ureg* ureg)
nf->ip = 0;
ureg->sp = sp;
ureg->pc = PTR2UINT(up->notify);
ureg->r0 = PTR2UINT(nf->arg0);
ureg->pc = (uintptr)up->notify;
ureg->r0 = (uintptr)nf->arg0;
up->notified = 1;
up->nnote--;

View file

@ -937,7 +937,7 @@ callwithureg(void (*fn)(Ureg*))
memset(&ureg, 0, sizeof ureg);
ureg.pc = getcallerpc(&fn);
ureg.sp = PTR2UINT(&fn);
ureg.sp = (uintptr)&fn;
fn(&ureg);
}