bcm: use extended small pages so XN bit can work

the change to support no-execute bits broke the original
raspberry pi1, as it uses backwards compatible page table
format.

to use the XN bit, subpage AP bits have to be disabled
using the XP bit in CP15 Control Register c1 Bit 23.
This commit is contained in:
cinap_lenrek 2019-12-04 22:02:51 +01:00
parent c9570c14af
commit f48f1a324a
7 changed files with 5 additions and 17 deletions

View file

@ -115,12 +115,6 @@ archbcmlink(void)
addclock0link(wdogfeed, HZ); addclock0link(wdogfeed, HZ);
} }
int
l2ap(int ap)
{
return (AP(3, (ap))|AP(2, (ap))|AP(1, (ap))|AP(0, (ap)));
}
int int
cmpswap(long *addr, long old, long new) cmpswap(long *addr, long old, long new)
{ {

View file

@ -221,12 +221,6 @@ archbcm2link(void)
addclock0link(wdogfeed, HZ); addclock0link(wdogfeed, HZ);
} }
int
l2ap(int ap)
{
return (AP(0, (ap)));
}
void void
cpustart(int cpu) cpustart(int cpu)
{ {

View file

@ -123,6 +123,7 @@
#define CpCha (1<<17) /* HA: hw access flag enable */ #define CpCha (1<<17) /* HA: hw access flag enable */
#define CpCdz (1<<19) /* DZ: divide by zero fault enable */ #define CpCdz (1<<19) /* DZ: divide by zero fault enable */
#define CpCfi (1<<21) /* FI: fast intrs */ #define CpCfi (1<<21) /* FI: fast intrs */
#define CpCxp (1<<23) /* XP: subpage AP bits disabled */
#define CpCve (1<<24) /* VE: intr vectors enable */ #define CpCve (1<<24) /* VE: intr vectors enable */
#define CpCee (1<<25) /* EE: exception endianness */ #define CpCee (1<<25) /* EE: exception endianness */
#define CpCnmfi (1<<27) /* NMFI: non-maskable fast intrs. */ #define CpCnmfi (1<<27) /* NMFI: non-maskable fast intrs. */
@ -309,8 +310,8 @@
#define F(v, o, w) (((v) & ((1<<(w))-1))<<(o)) #define F(v, o, w) (((v) & ((1<<(w))-1))<<(o))
#define AP(n, v) F((v), ((n)*2)+4, 2) #define AP(n, v) F((v), ((n)*2)+4, 2)
#define L1AP(ap) (AP(3, (ap))) #define L1AP(ap) AP(3, (ap))
/* L2AP differs between armv6 and armv7 -- see l2ap in arch*.c */ #define L2AP(ap) AP(0, (ap))
#define DAC(n, v) F((v), (n)*2, 2) #define DAC(n, v) F((v), (n)*2, 2)
#define HVECTORS 0xffff0000 #define HVECTORS 0xffff0000

View file

@ -57,7 +57,7 @@ _ramZ:
* enable caches, mmu, and high vectors * enable caches, mmu, and high vectors
*/ */
MRC CpSC, 0, R0, C(CpCONTROL), C(0), CpMainctl MRC CpSC, 0, R0, C(CpCONTROL), C(0), CpMainctl
ORR $(CpChv|CpCdcache|CpCicache|CpCpredict|CpCmmu), R0 ORR $(CpCxp|CpChv|CpCdcache|CpCicache|CpCpredict|CpCmmu), R0
MCR CpSC, 0, R0, C(CpCONTROL), C(0), CpMainctl MCR CpSC, 0, R0, C(CpCONTROL), C(0), CpMainctl
ISB ISB

View file

@ -99,7 +99,6 @@ extern void wdogoff(void);
extern void wdogfeed(void); extern void wdogfeed(void);
extern void writeconf(void); extern void writeconf(void);
extern void vtable(void); extern void vtable(void);
extern int l2ap(int);
extern uint getcputemp(void); extern uint getcputemp(void);
extern char *cputype2name(char *buf, int size); extern char *cputype2name(char *buf, int size);
extern uint getboardrev(void); extern uint getboardrev(void);

View file

@ -112,6 +112,7 @@ armv7.$O: cache.v7.s
main.$O: errstr.h init.h reboot.h main.$O: errstr.h init.h reboot.h
devmouse.$O mouse.$O screen.$O: screen.h devmouse.$O mouse.$O screen.$O: screen.h
usbdwc.$O: dwcotg.h ../port/usb.h usbdwc.$O: dwcotg.h ../port/usb.h
arch.$O archbcm.$O archbcm2.$O clock.$O coproc.$O fpiarn.$O mmu.$O trap.$O vfp3.$O: arm.h mem.h
init.h:D: ../port/initcode.c init9.s init.h:D: ../port/initcode.c init9.s
$CC ../port/initcode.c $CC ../port/initcode.c

View file

@ -9,7 +9,6 @@
#define FEXT(d, o, w) (((d)>>(o)) & ((1<<(w))-1)) #define FEXT(d, o, w) (((d)>>(o)) & ((1<<(w))-1))
#define L1X(va) FEXT((va), 20, 12) #define L1X(va) FEXT((va), 20, 12)
#define L2X(va) FEXT((va), 12, 8) #define L2X(va) FEXT((va), 12, 8)
#define L2AP(ap) l2ap(ap)
#define L1ptedramattrs soc.l1ptedramattrs #define L1ptedramattrs soc.l1ptedramattrs
#define L2ptedramattrs soc.l2ptedramattrs #define L2ptedramattrs soc.l2ptedramattrs
#define PTEDRAM (PHYSDRAM|Dom0|L1AP(Krw)|Section|L1ptedramattrs) #define PTEDRAM (PHYSDRAM|Dom0|L1AP(Krw)|Section|L1ptedramattrs)