imx8/usbxhci: bring usb out of reset
do all the magic dwc3 specific initalization as well as reset the hub and power on the phys. with this, "usb start" command is not needed anymore from u-boot.
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1 changed files with 104 additions and 0 deletions
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@ -1785,6 +1785,92 @@ clkenable(int i, int on)
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setclkgate(clk, on);
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}
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static void
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hubreset(int on)
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{
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/* gpio registers */
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enum {
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GPIO_DR = 0x00/4,
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GPIO_GDIR = 0x04/4,
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GPIO_PSR = 0x08/4,
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GPIO_ICR1 = 0x0C/4,
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GPIO_ICR2 = 0x10/4,
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GPIO_IMR = 0x14/4,
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GPIO_ISR = 0x18/4,
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GPIO_EDGE_SEL = 0x1C/4,
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};
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static u32int *gpio1 = (u32int*)(VIRTIO + 0x200000);
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gpio1[GPIO_GDIR] |= 1<<14; /* output */
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if(on)
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gpio1[GPIO_DR] |= 1<<14;
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else
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gpio1[GPIO_DR] &= ~(1<<14);
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}
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static void
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powerup(int i)
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{
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/* power gating controller registers */
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enum {
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GPC_PGC_CPU_0_1_MAPPING = 0xEC/4,
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GPC_PGC_PU_PGC_SW_PUP_REQ = 0xF8/4,
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USB_OTG1_SW_PUP_REQ = 1<<2,
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};
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static u32int *gpc = (u32int*)(VIRTIO + 0x3A0000);
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gpc[GPC_PGC_CPU_0_1_MAPPING] = 0x0000FFFF;
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gpc[GPC_PGC_PU_PGC_SW_PUP_REQ] |= (USB_OTG1_SW_PUP_REQ<<i);
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while(gpc[GPC_PGC_PU_PGC_SW_PUP_REQ] & (USB_OTG1_SW_PUP_REQ<<i))
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;
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gpc[GPC_PGC_CPU_0_1_MAPPING] = 0;
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}
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static void
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phyinit(u32int *reg)
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{
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enum {
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PHY_CTRL0 = 0x0/4,
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CTRL0_REF_SSP_EN = 1<<2,
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PHY_CTRL1 = 0x4/4,
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CTRL1_RESET = 1<<0,
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CTRL1_ATERESET = 1<<3,
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CTRL1_VDATSRCENB0 = 1<<19,
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CTRL1_VDATDETEBB0 = 1<<20,
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PHY_CTRL2 = 0x8/4,
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CTRL2_TXENABLEN0 = 1<<8,
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};
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reg[PHY_CTRL1] = (reg[PHY_CTRL1] & ~(CTRL1_VDATSRCENB0 | CTRL1_VDATDETEBB0)) | CTRL1_RESET | CTRL1_ATERESET;
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reg[PHY_CTRL0] |= CTRL0_REF_SSP_EN;
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reg[PHY_CTRL2] |= CTRL2_TXENABLEN0;
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reg[PHY_CTRL1] &= ~(CTRL1_RESET | CTRL1_ATERESET);
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}
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static void
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coreinit(u32int *reg)
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{
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enum {
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GCTL = 0xC110/4,
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PWRDNSCALE_SHIFT = 19,
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PWRDNSCALE_MASK = 0x3FFF << PWRDNSCALE_SHIFT,
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PRTCAPDIR_SHIFT = 12,
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PRTCAPDIR_MASK = 3 << PRTCAPDIR_SHIFT,
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DISSCRAMBLE = 1<<3,
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DSBLCLKGTNG = 1<<0,
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GFLADJ = 0xC630/4,
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GFLADJ_30MHZ_SDBND_SEL = 1<<7,
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GFLADJ_30MHZ_SHIFT = 0,
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GFLADJ_30MHZ_MASK = 0x3F << GFLADJ_30MHZ_SHIFT,
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};
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reg[GCTL] &= ~(PWRDNSCALE_MASK | DISSCRAMBLE | DSBLCLKGTNG | PRTCAPDIR_MASK);
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reg[GCTL] |= 2<<PWRDNSCALE_SHIFT | 1<<PRTCAPDIR_SHIFT;
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reg[GFLADJ] = (reg[GFLADJ] & ~GFLADJ_30MHZ_MASK) | 0x20<<GFLADJ_30MHZ_SHIFT | GFLADJ_30MHZ_SDBND_SEL;
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}
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static int
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reset(Hci *hp)
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{
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@ -1808,13 +1894,31 @@ reset(Hci *hp)
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Found:
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if(i == 0){
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static u32int *iomuxc = (u32int*)(VIRTIO + 0x330000);
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enum {
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IOMUXC_CTL_PAD_GPIO1_IO13 = 0x5C/4, /* for gpio1 13 */
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IOMUXC_CTL_PAD_GPIO1_IO14 = 0x60/4, /* for gpio1 14 */
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IOMUXC_SW_PAD_CTRL_PAD_GPIO1_IO14 = 0x2C8/4,
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};
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iomuxc[IOMUXC_CTL_PAD_GPIO1_IO13] = 1;
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iomuxc[IOMUXC_CTL_PAD_GPIO1_IO14] = 0;
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iomuxc[IOMUXC_SW_PAD_CTRL_PAD_GPIO1_IO14] = 0x16;
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hubreset(0);
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microdelay(500);
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hubreset(1);
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for(i = 0; i < nelem(ctlrs); i++) clkenable(i, 0);
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setclkrate("ccm_usb_bus_clk_root", "system_pll2_div2", 500*Mhz);
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setclkrate("ccm_usb_core_ref_clk_root", "system_pll1_div8", 100*Mhz);
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setclkrate("ccm_usb_phy_ref_clk_root", "system_pll1_div8", 100*Mhz);
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i = 0;
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}
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powerup(i);
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clkenable(i, 1);
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phyinit(&ctlr->mmio[0xF0040/4]);
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coreinit(ctlr->mmio);
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hp->init = init;
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hp->dump = dump;
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