igfx: add TypeILK, since it differs slightly from SNB
ILK's LVDS transcoder select field only has 1 bit, like G45.
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a00957efee
commit
d52f25ecdc
1 changed files with 20 additions and 8 deletions
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@ -23,8 +23,9 @@ enum {
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enum {
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TypeG45,
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TypeIVB, /* Ivy Bridge */
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TypeILK, /* Iron Lake */
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TypeSNB, /* Sandy Bridge (unfinished) */
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TypeIVB, /* Ivy Bridge */
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TypeHSW, /* Haswell */
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};
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@ -255,8 +256,9 @@ snarftrans(Igfx *igfx, Trans *t, u32int o)
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t->ln[0] = snarfreg(igfx, 0x70064); /* DPLinkN */
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}
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break;
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case TypeIVB:
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case TypeILK:
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case TypeSNB:
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case TypeIVB:
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t->dm[0] = snarfreg(igfx, o + 0x30);
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t->dn[0] = snarfreg(igfx, o + 0x34);
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t->dm[1] = snarfreg(igfx, o + 0x38);
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@ -295,7 +297,8 @@ snarfpipe(Igfx *igfx, int x)
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if(igfx->type != TypeHSW || x != 3)
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p->src = snarfreg(igfx, o + 0x0001C);
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if(igfx->type == TypeHSW) {
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switch(igfx->type){
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case TypeHSW:
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p->dpctl = snarfreg(igfx, o + 0x400); /* PIPE_DDI_FUNC_CTL_x */
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p->dpll = &igfx->dpll[0];
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if(x == 3){
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@ -303,7 +306,10 @@ snarfpipe(Igfx *igfx, int x)
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p->src = snarfreg(igfx, 0x6001C);
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}else
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p->clksel = snarfreg(igfx, 0x46140 + x*4);
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} else if(igfx->type == TypeIVB || igfx->type == TypeSNB) {
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break;
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case TypeILK:
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case TypeSNB:
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case TypeIVB:
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p->fdi->txctl = snarfreg(igfx, o + 0x100);
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o = 0xE0000 | x*0x1000;
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@ -324,8 +330,10 @@ snarfpipe(Igfx *igfx, int x)
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p->fdi->dpll = &igfx->dpll[(igfx->dpllsel[0].v>>(x*4)) & 1];
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p->dpll = nil;
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} else {
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break;
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case TypeG45:
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p->dpll = &igfx->dpll[x & 1];
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break;
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}
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/* display plane */
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@ -349,6 +357,7 @@ snarfpipe(Igfx *igfx, int x)
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p->dsp->pos = snarfreg(igfx, 0x7018C + x*0x1000);
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p->dsp->size = snarfreg(igfx, 0x70190 + x*0x1000);
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/* wet floor */
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case TypeILK:
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case TypeSNB:
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p->cur->cntr = snarfreg(igfx, 0x70080 + x*0x40);
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p->cur->base = snarfreg(igfx, 0x70084 + x*0x40);
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@ -375,6 +384,7 @@ devtype(Igfx *igfx)
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case 0x0152: /* 2nd/3rd Gen Core - Core-i3 */
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return TypeIVB;
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case 0x0046: /* Thinkpad T510 */
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return TypeILK;
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case 0x0102: /* Dell Optiplex 790 */
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case 0x0126: /* Thinkpad X220 */
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return TypeSNB;
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@ -461,6 +471,7 @@ snarf(Vga* vga, Ctlr* ctlr)
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igfx->vgacntrl = snarfreg(igfx, 0x071400);
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break;
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case TypeILK:
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case TypeSNB:
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igfx->npipe = 2; /* A,B */
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igfx->cdclk = 400; /* MHz */
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@ -780,6 +791,7 @@ initdpll(Igfx *igfx, int x, int freq, int port)
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dpll->ctrl.v &= ~(3<<13);
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dpll->ctrl.v |= (port == PortLCD ? 3 : 0) << 13;
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break;
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case TypeILK:
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case TypeSNB:
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case TypeIVB:
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/* transcoder dpll enable */
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@ -1159,7 +1171,7 @@ init(Vga* vga, Ctlr* ctlr)
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case PortLCD:
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if(igfx->type == TypeHSW)
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goto Badport;
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if(igfx->type == TypeG45)
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if(igfx->type == TypeG45 || igfx->type == TypeILK)
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x = (igfx->lvds.v >> 30) & 1;
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else
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x = (igfx->lvds.v >> 29) & 3;
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@ -1412,7 +1424,7 @@ enablepipe(Igfx *igfx, int x)
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loadreg(igfx, p->fdi->rxctl);
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sleep(5);
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/* clear auto training bits */
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if(igfx->type == TypeSNB)
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if(igfx->type == TypeILK || igfx->type == TypeSNB)
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p->fdi->txctl.v &= ~(3<<28 | 1<<10 | 1);
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else
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p->fdi->txctl.v &= ~(7<<8 | 1);
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@ -1466,7 +1478,7 @@ enablepipe(Igfx *igfx, int x)
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loadreg(igfx, p->fdi->rxtu[0]);
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loadreg(igfx, p->fdi->rxmisc);
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if(igfx->type == TypeSNB){
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if(igfx->type == TypeILK || igfx->type == TypeSNB){
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/* unmask bit lock and symbol lock bits */
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csr(igfx, p->fdi->rximr.a, 3<<8, 0);
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