audioac97: fix inverted recgain control, init to zero recgain

some controls are inverted. we reflect this by specifying
negative range in the volume table now and let genaudiovolread()
and genaudiovolwrite() do the conversion.
This commit is contained in:
cinap_lenrek 2013-01-27 17:20:42 +01:00
parent 866ee3ab5d
commit c1cb685a32
3 changed files with 34 additions and 28 deletions

View file

@ -114,18 +114,18 @@ enum {
};
static Volume voltab[] = {
[Vmaster] "master", 0x02, 63, Stereo, 0,
[Vaudio] "audio", 0x18, 31, Stereo, 0,
[Vhead] "head", 0x04, 31, Stereo, Capheadphones,
[Vmaster] "master", 0x02, -63, Stereo, 0,
[Vaudio] "audio", 0x18, -31, Stereo, 0,
[Vhead] "head", 0x04, -31, Stereo, Capheadphones,
[Vbass] "bass", 0x08, 15, Left, Captonectl,
[Vtreb] "treb", 0x08, 15, Right, Captonectl,
[Vbeep] "beep", 0x0a, 31, Right, 0,
[Vphone] "phone", 0x0c, 31, Right, 0,
[Vmic] "mic", 0x0e, 31, Right, Capmic,
[Vline] "line", 0x10, 31, Stereo, 0,
[Vcd] "cd", 0x12, 31, Stereo, 0,
[Vvideo] "video", 0x14, 31, Stereo, 0,
[Vaux] "aux", 0x16, 63, Stereo, 0,
[Vbeep] "beep", 0x0a, -31, Right, 0,
[Vphone] "phone", 0x0c, -31, Right, 0,
[Vmic] "mic", 0x0e, -31, Right, Capmic,
[Vline] "line", 0x10, -31, Stereo, 0,
[Vcd] "cd", 0x12, -31, Stereo, 0,
[Vvideo] "video", 0x14, -31, Stereo, 0,
[Vaux] "aux", 0x16, -63, Stereo, 0,
[Vrecgain] "recgain", 0x1c, 15, Stereo, 0,
[Vmicgain] "micgain", 0x1e, 15, Right, Capmic,
[Vspeed] "speed", 0x2c, 0, Absolute, 0,
@ -160,11 +160,10 @@ ac97volget(Audio *adev, int x, int a[2])
default:
v = m->rr(adev, vol->reg);
if(v & 0x8000){
a[0] = 0;
a[1] = 0;
a[0] = a[1] = vol->range < 0 ? 0x7f : 0;
} else {
a[0] = vol->range - ((v>>8) & 0x7f);
a[1] = vol->range - (v & 0x7f);
a[0] = ((v>>8) & 0x7f);
a[1] = (v & 0x7f);
}
}
return 0;
@ -191,18 +190,18 @@ ac97volset(Audio *adev, int x, int a[2])
}
break;
case Left:
v = (vol->range - a[0]) & 0x7f;
v = a[0] & 0x7f;
w = m->rr(adev, vol->reg) & 0x7f;
m->wr(adev, vol->reg, (v<<8)|w);
break;
case Right:
v = m->rr(adev, vol->reg) & 0x7f00;
w = (vol->range - a[1]) & 0x7f;
w = a[1] & 0x7f;
m->wr(adev, vol->reg, v|w);
break;
case Stereo:
v = (vol->range - a[0]) & 0x7f;
w = (vol->range - a[1]) & 0x7f;
v = a[0] & 0x7f;
w = a[1] & 0x7f;
m->wr(adev, vol->reg, (v<<8)|w);
break;
}

View file

@ -1321,7 +1321,7 @@ enum {
static Volume voltab[] = {
[Vmaster] "master", 0, 0x7f, Stereo, 0,
[Vrecord] "record", 0, 0x7f, Stereo, 0,
[Vrecord] "recgain", 0, 0x7f, Stereo, 0,
[Vspeed] "speed", 0, 0, Absolute, 0,
[Vdelay] "delay", 0, 0, Absolute, 0,
0

View file

@ -150,6 +150,7 @@ audioattach(char *spec)
"master 100",
"audio 100",
"head 100",
"recgain 0",
};
attached |= i;
@ -367,7 +368,7 @@ long
genaudiovolread(Audio *adev, void *a, long n, vlong,
Volume *vol, int (*volget)(Audio *, int, int *), ulong caps)
{
int i, j, v[2];
int i, j, r, v[2];
char *p, *e;
p = a;
@ -382,14 +383,17 @@ genaudiovolread(Audio *adev, void *a, long n, vlong,
if(vol[i].type == Absolute)
p += snprint(p, e - p, "%s %d\n", vol[i].name, v[0]);
else {
if(vol[i].range == 0)
r = abs(vol[i].range);
if(r == 0)
continue;
for(j=0; j<2; j++){
if(v[j] < 0)
v[j] = 0;
if(v[j] > vol[i].range)
v[j] = vol[i].range;
v[j] = (v[j]*100)/vol[i].range;
if(v[j] > r)
v[j] = r;
if(vol[i].range < 0)
v[j] = r - v[j];
v[j] = (v[j]*100)/r;
}
switch(vol[i].type){
case Left:
@ -418,7 +422,7 @@ long
genaudiovolwrite(Audio *adev, void *a, long n, vlong,
Volume *vol, int (*volset)(Audio *, int, int *), ulong caps)
{
int ntok, i, j, v[2];
int ntok, i, j, r, v[2];
char *p, *e, *x, *tok[4];
p = a;
@ -455,12 +459,15 @@ genaudiovolwrite(Audio *adev, void *a, long n, vlong,
if(vol[i].type == Absolute)
(*volset)(adev, i, v);
else {
r = abs(vol[i].range);
for(j=0; j<2; j++){
v[j] = (50+(v[j]*vol[i].range))/100;
v[j] = (50+(v[j]*r))/100;
if(v[j] < 0)
v[j] = 0;
if(v[j] > vol[i].range)
v[j] = vol[i].range;
if(v[j] > r)
v[j] = r;
if(vol[i].range < 0)
v[j] = r - v[j];
}
(*volset)(adev, i, v);
}