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pc, pc64: do page attribute table (PAT) init early in cpuidentify()

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the page attribute table was initialized in mmuinit(), which is
too late for bootscreen(). So now we check for PAT support and
insert the write-combine entry early in cpuidentify().

this might have been the cause of some slow EFI framebuffers on
machines with overlapping or insufficient MTRR entries.
This commit is contained in:
cinap_lenrek 2020-05-22 23:58:24 +02:00
parent 0002fd0cf7
commit b86bb35c7d
5 changed files with 13 additions and 25 deletions
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9
sys/src/9/pc/devarch.c
View file

@ -749,7 +749,7 @@ cpuidentify(void)
X86type *t, *tab;
uintptr cr4;
ulong regs[4];
vlong mca, mct;
vlong mca, mct, pat;
cpuid(Highstdfunc, regs);
memmove(m->cpuidid, &regs[1], BY2WD); /* bx */
@ -882,6 +882,13 @@ cpuidentify(void)
rdmsr(0x01, &mct);
}
/* IA32_PAT write combining */
if((m->cpuiddx & Pat) != 0 && rdmsr(0x277, &pat) != -1){
pat &= ~(255LL<<(PATWC*8));
pat |= 1LL<<(PATWC*8); /* WC */
wrmsr(0x277, pat);
}
if(m->cpuiddx & Mtrr)
mtrrsync();

2
sys/src/9/pc/mem.h
View file

@ -173,3 +173,5 @@
#define getpgcolor(a) 0
/* PAT entry used for write combining */
#define PATWC 7

13
sys/src/9/pc/mmu.c
View file

@ -66,11 +66,6 @@ static void memglobal(void);
#define VPTX(va) (((ulong)(va))>>12)
#define vpd (vpt+VPTX(VPT))
enum {
/* PAT entry used for write combining */
PATWC = 7,
};
void
mmuinit(void)
{
@ -125,14 +120,6 @@ mmuinit(void)
taskswitch(PADDR(m->pdb), (ulong)m + BY2PG);
ltr(TSSSEL);
/* IA32_PAT write combining */
if((MACHP(0)->cpuiddx & Pat) != 0
&& rdmsr(0x277, &v) != -1){
v &= ~(255LL<<(PATWC*8));
v |= 1LL<<(PATWC*8); /* WC */
wrmsr(0x277, v);
}
}
/*

3
sys/src/9/pc64/mem.h
View file

@ -176,5 +176,8 @@
#define getpgcolor(a) 0
/* PAT entry used for write combining */
#define PATWC 7
#define RMACH R15 /* m-> */
#define RUSER R14 /* up-> */

11
sys/src/9/pc64/mmu.c
View file

@ -38,9 +38,6 @@ enum {
PDE = 0,
MAPBITS = 8*sizeof(m->mmumap[0]),
/* PAT entry used for write combining */
PATWC = 7,
};
static void
@ -133,14 +130,6 @@ mmuinit(void)
wrmsr(Star, ((uvlong)UE32SEL << 48) | ((uvlong)KESEL << 32));
wrmsr(Lstar, (uvlong)syscallentry);
wrmsr(Sfmask, 0x200);
/* IA32_PAT write combining */
if((MACHP(0)->cpuiddx & Pat) != 0
&& rdmsr(0x277, &v) != -1){
v &= ~(255LL<<(PATWC*8));
v |= 1LL<<(PATWC*8); /* WC */
wrmsr(0x277, v);
}
}
/*