merge
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commit
b1d1fa04b9
2 changed files with 13 additions and 13 deletions
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@ -383,16 +383,8 @@ e820scan(void)
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}
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}
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/*
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* Make sure RAM is set to writeback,
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* but do a sanity check first checking
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* that the kernel text is writeback.
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* This is needed as some emulators (bhyve)
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* set everything to uncached.
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*/
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s = mtrrattr(PADDR(KTZERO), nil);
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if(s != nil && strcmp(s, "wb") == 0)
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mtrrexclude(MemRAM, "wb");
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/* RAM needs to be writeback */
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mtrrexclude(MemRAM, "wb");
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for(base = memmapnext(-1, MemRAM); base != -1; base = memmapnext(base, MemRAM)){
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size = memmapsize(base, BY2PG) & ~(BY2PG-1);
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@ -305,12 +305,14 @@ getstate(State *s)
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vlong v;
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int i;
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s->mask = physmask();
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if(rdmsr(MTRRCap, &s->cap) < 0)
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return -1;
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if((s->cap & (Capfix|Capvcnt)) == 0)
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return -1;
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if(rdmsr(MTRRDefaultType, &s->def) < 0)
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return -1;
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if(rdmsr(MTRRCap, &s->cap) < 0)
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return -1;
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if(s->cap & Capfix){
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for(i = 0; i < nelem(fixreg); i++){
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@ -332,6 +334,8 @@ getstate(State *s)
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return -1;
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}
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s->mask = physmask();
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if(strcmp(m->cpuidid, "AuthenticAMD") != 0
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|| m->cpuidfamily < 15
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|| rdmsr(AMDK8SysCfg, &v) < 0
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@ -674,6 +678,10 @@ mtrr(uvlong base, uvlong size, char *tstr)
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if((new.type = str2type(tstr)) < 0)
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return "bad cache type";
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if(new.type == Writecomb
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&& (cpu0state.cap & Capwc) == 0)
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return "write combining not supported";
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qlock(&mtrrlk);
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newstate = cpu0state;
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nr = getranges(&newstate, ranges, Nranges, &new);
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