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pc, pc64: handle sse simd exceptions

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This commit is contained in:
cinap_lenrek 2014-05-11 05:59:10 +02:00
parent edca217bb9
commit a9155014c0
7 changed files with 39 additions and 8 deletions
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3
sys/src/9/pc/devarch.c
View file

@ -41,6 +41,7 @@ enum {
enum {
CR4Osfxsr = 1 << 9,
CR4Oxmmex = 1 << 10,
};
enum { /* cpuid standard function codes */
@ -860,7 +861,7 @@ cpuidentify(void)
if(m->cpuiddx & Fxsr){ /* have sse fp? */
fpsave = fpssesave;
fprestore = fpsserestore;
putcr4(getcr4() | CR4Osfxsr);
putcr4(getcr4() | CR4Osfxsr|CR4Oxmmex);
} else {
fpsave = fpx87save;
fprestore = fpx87restore;

1
sys/src/9/pc/fns.h
View file

@ -94,6 +94,7 @@ void* kaddr(ulong);
void kbdenable(void);
void kbdinit(void);
#define kmapinval()
void ldmxcsr(ulong);
void lgdt(ushort[3]);
void lldt(ulong);
void lidt(ushort[3]);

3
sys/src/9/pc/io.h
View file

@ -15,6 +15,9 @@ enum {
VectorPF = 14, /* page fault */
Vector15 = 15, /* reserved */
VectorCERR = 16, /* coprocessor error */
VectorAC = 17, /* alignment check */
VectorMC = 18, /* machine check */
VectorSIMD = 19, /* simd error */
VectorPIC = 32, /* external i8259 interrupts */
IrqCLOCK = 0,

6
sys/src/9/pc/l.s
View file

@ -645,6 +645,10 @@ TEXT fpsserestore0(SB), $0 /* enable and restore state */
WAIT
RET
TEXT ldmxcsr(SB), $0 /* Load MXCSR */
LDMXCSR mxcsr+0(FP)
RET
/*
*/
TEXT splhi(SB), $0
@ -983,7 +987,7 @@ TEXT vectortable(SB), $0
CALL _strayintr(SB); BYTE $0x10 /* coprocessor error */
CALL _strayintrx(SB); BYTE $0x11 /* alignment check */
CALL _strayintr(SB); BYTE $0x12 /* machine check */
CALL _strayintr(SB); BYTE $0x13
CALL _strayintr(SB); BYTE $0x13 /* simd error */
CALL _strayintr(SB); BYTE $0x14
CALL _strayintr(SB); BYTE $0x15
CALL _strayintr(SB); BYTE $0x16

14
sys/src/9/pc/main.c
View file

@ -731,6 +731,17 @@ matherror(Ureg*, void*)
mathnote(up->fpsave.status, up->fpsave.pc);
}
/*
* SIMD error
*/
static void
simderror(Ureg *ureg, void*)
{
fpsave(&up->fpsave);
up->fpstate = FPinactive;
mathnote(up->fpsave.mxcsr & 0x3f, ureg->pc);
}
/*
* math coprocessor emulation fault
*/
@ -747,6 +758,8 @@ mathemu(Ureg *ureg, void*)
switch(up->fpstate){
case FPinit:
fpinit();
if(fpsave == fpssesave)
ldmxcsr(0); /* no simd exceptions on 386 */
up->fpstate = FPactive;
break;
case FPinactive:
@ -790,6 +803,7 @@ mathinit(void)
intrenable(IrqIRQ13, matherror, 0, BUSUNKNOWN, "matherror");
trapenable(VectorCNA, mathemu, 0, "mathemu");
trapenable(VectorCSO, mathover, 0, "mathover");
trapenable(VectorSIMD, simderror, 0, "simderror");
}
/*

2
sys/src/9/pc64/l.s
View file

@ -892,7 +892,7 @@ TEXT vectortable(SB), $0
CALL _strayintr(SB); BYTE $0x10 /* coprocessor error */
CALL _strayintrx(SB); BYTE $0x11 /* alignment check */
CALL _strayintr(SB); BYTE $0x12 /* machine check */
CALL _strayintr(SB); BYTE $0x13
CALL _strayintr(SB); BYTE $0x13 /* simd error */
CALL _strayintr(SB); BYTE $0x14
CALL _strayintr(SB); BYTE $0x15
CALL _strayintr(SB); BYTE $0x16

18
sys/src/9/pc64/main.c
View file

@ -731,6 +731,17 @@ matherror(Ureg*, void*)
mathnote(up->fpsave.fsw, up->fpsave.rip);
}
/*
* SIMD error
*/
static void
simderror(Ureg *ureg, void*)
{
fpsave(&up->fpsave);
up->fpstate = FPinactive;
mathnote(up->fpsave.mxcsr & 0x3f, ureg->pc);
}
/*
* math coprocessor emulation fault
*/
@ -758,11 +769,7 @@ mathemu(Ureg *ureg, void*)
_fninit();
_fwait();
_fldcw(0x0232);
/*
* TODO: sse exceptions
* _ldmxcsr(m->mxcsr);
*
*/
_ldmxcsr(0x1900);
up->fpstate = FPactive;
break;
case FPinactive:
@ -806,6 +813,7 @@ mathinit(void)
intrenable(IrqIRQ13, matherror, 0, BUSUNKNOWN, "matherror");
trapenable(VectorCNA, mathemu, 0, "mathemu");
trapenable(VectorCSO, mathover, 0, "mathover");
trapenable(VectorSIMD, simderror, 0, "simderror");
}
void