From 90f47fadf8808d84d9bde8316f3945e60650093d Mon Sep 17 00:00:00 2001
From: cinap_lenrek <cinap_lenrek@felloff.net>
Date: Sat, 9 Jul 2022 16:06:42 +0000
Subject: [PATCH] imx8: detect cpu lcycles() frequency

---
 sys/src/9/imx8/clock.c | 21 +++++++++++++++++++--
 sys/src/9/imx8/main.c  |  8 ++++++++
 2 files changed, 27 insertions(+), 2 deletions(-)

diff --git a/sys/src/9/imx8/clock.c b/sys/src/9/imx8/clock.c
index a6b9ab034..19bbc9625 100644
--- a/sys/src/9/imx8/clock.c
+++ b/sys/src/9/imx8/clock.c
@@ -29,6 +29,9 @@ localclockintr(Ureg *ureg, void *)
 void
 clockinit(void)
 {
+	uvlong tstart, tend;
+	ulong t0, t1;
+
 	syswr(PMCR_EL0, 1<<6 | 7);
 	syswr(PMCNTENSET, 1<<31);
 	syswr(PMUSERENR_EL0, 1<<2);
@@ -41,8 +44,22 @@ clockinit(void)
 		freq = sysrd(CNTFRQ_EL0);
 		print("timer frequency %lld Hz\n", freq);
 	}
-	m->cpuhz = freq;
-	m->cpumhz = (freq + Mhz/2 - 1) / Mhz;
+	tstart = sysrd(CNTPCT_EL0);
+	do{
+		t0 = lcycles();
+	}while(sysrd(CNTPCT_EL0) == tstart);
+	tend = tstart + (freq/100);
+	do{
+		t1 = lcycles();
+	}while(sysrd(CNTPCT_EL0) < tend);
+	t1 -= t0;
+	m->cpuhz = 100 * t1;
+	m->cpumhz = (m->cpuhz + Mhz/2 - 1) / Mhz;
+
+	/*
+	 * we are using virtual counter register CNTVCT_EL0
+	 * instead of the performance counter in userspace.
+	 */
 	m->cyclefreq = freq;
 
 	intrenable(IRQcntpns, localclockintr, nil, BUSUNKNOWN, "clock");
diff --git a/sys/src/9/imx8/main.c b/sys/src/9/imx8/main.c
index b0494f682..1b7ee9969 100644
--- a/sys/src/9/imx8/main.c
+++ b/sys/src/9/imx8/main.c
@@ -134,6 +134,12 @@ mpinit(void)
 	spllo();
 }
 
+void
+cpuidprint(void)
+{
+	iprint("cpu%d: %dMHz ARM Cortex A53\n", m->machno, m->cpumhz);
+}
+
 void
 main(void)
 {
@@ -143,6 +149,7 @@ main(void)
 		fpuinit();
 		intrinit();
 		clockinit();
+		cpuidprint();
 		synccycles();
 		timersinit();
 		flushtlb();
@@ -162,6 +169,7 @@ main(void)
 	fpuinit();
 	intrinit();
 	clockinit();
+	cpuidprint();
 	timersinit();
 	pageinit();
 	procinit0();