imx8: provide iomuxgpr() function to access iomuxc's gpr's
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5388575c14
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8dd05d041e
3 changed files with 18 additions and 12 deletions
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@ -151,5 +151,6 @@ extern void powerup(char *dom);
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/* lcd */
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/* lcd */
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extern void lcdinit(void);
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extern void lcdinit(void);
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/* iomuc */
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/* iomux */
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extern void iomuxpad(char *pads, char *sel, char *cfg);
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extern void iomuxpad(char *pads, char *sel, char *cfg);
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extern uint iomuxgpr(int gpr, uint set, uint mask);
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@ -15,6 +15,8 @@ enum {
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IOMUXC_SW_PAD_CTL_PAD_TEST_MODE = 0x254/4,
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IOMUXC_SW_PAD_CTL_PAD_TEST_MODE = 0x254/4,
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IOMUXC_CCM_PMIC_READY_SELECT_INPUT = 0x4BC/4,
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IOMUXC_CCM_PMIC_READY_SELECT_INPUT = 0x4BC/4,
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IOMUXC_GPR_GPR0 = 0x10000/4,
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};
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};
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enum {
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enum {
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@ -1123,3 +1125,15 @@ Muxok:
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// iprint("iomuxpad: %s_input_select %p <= %.8ux & %.8ux\n", signame[sig], PADDR(reg), val, mask);
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// iprint("iomuxpad: %s_input_select %p <= %.8ux & %.8ux\n", signame[sig], PADDR(reg), val, mask);
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*reg = (*reg & ~mask) | val;
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*reg = (*reg & ~mask) | val;
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}
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}
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uint
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iomuxgpr(int gpr, uint set, uint mask)
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{
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u32int *reg = &iomuxc[IOMUXC_GPR_GPR0 + gpr];
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if(mask == 0)
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return *reg;
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// iprint("iomuxgpr: gpr%d %p <= %.8ux & %.8ux\n", gpr, PADDR(reg), set, mask);
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return *reg = (*reg & ~mask) | (set & mask);
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}
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@ -14,13 +14,6 @@
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extern Memimage *gscreen;
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extern Memimage *gscreen;
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/* pinmux registers */
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enum {
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IOMUXC_GPR_GPR13 = 0x10034/4, /* GPR13 for MIPI_MUX_SEL */
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MIPI_MUX_SEL = 1<<2,
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MIPI_MUX_INV = 1<<3,
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};
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/* gpio registers */
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/* gpio registers */
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enum {
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enum {
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GPIO_DR = 0x00/4,
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GPIO_DR = 0x00/4,
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@ -366,8 +359,6 @@ struct dsi_cfg {
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/* base addresses, VIRTIO is at 0x30000000 physical */
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/* base addresses, VIRTIO is at 0x30000000 physical */
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static u32int *iomuxc = (u32int*)(VIRTIO + 0x330000);
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static u32int *gpio1 = (u32int*)(VIRTIO + 0x200000);
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static u32int *gpio1 = (u32int*)(VIRTIO + 0x200000);
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static u32int *gpio3 = (u32int*)(VIRTIO + 0x220000);
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static u32int *gpio3 = (u32int*)(VIRTIO + 0x220000);
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@ -828,8 +819,8 @@ lcdinit(void)
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/* pwm2_out: for panel backlight */
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/* pwm2_out: for panel backlight */
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iomuxpad("pad_spdif_rx", "pwm2_out", nil);
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iomuxpad("pad_spdif_rx", "pwm2_out", nil);
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/* lcdif to dpi=0, dcss=1 */
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/* GPR13[MIPI_MUX_SEL]: 0 = LCDIF, 1 = DCSS */
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mr(iomuxc, IOMUXC_GPR_GPR13, 0, MIPI_MUX_SEL);
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iomuxgpr(13, 0, 1<<2);
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setclkgate("gpio1.ipg_clk_s", 1);
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setclkgate("gpio1.ipg_clk_s", 1);
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setclkgate("gpio3.ipg_clk_s", 1);
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setclkgate("gpio3.ipg_clk_s", 1);
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