imx8: provide iomuxgpr() function to access iomuxc's gpr's

This commit is contained in:
cinap_lenrek 2022-06-13 19:48:01 +00:00
parent 5388575c14
commit 8dd05d041e
3 changed files with 18 additions and 12 deletions

View file

@ -151,5 +151,6 @@ extern void powerup(char *dom);
/* lcd */
extern void lcdinit(void);
/* iomuc */
/* iomux */
extern void iomuxpad(char *pads, char *sel, char *cfg);
extern uint iomuxgpr(int gpr, uint set, uint mask);

View file

@ -15,6 +15,8 @@ enum {
IOMUXC_SW_PAD_CTL_PAD_TEST_MODE = 0x254/4,
IOMUXC_CCM_PMIC_READY_SELECT_INPUT = 0x4BC/4,
IOMUXC_GPR_GPR0 = 0x10000/4,
};
enum {
@ -1123,3 +1125,15 @@ Muxok:
// iprint("iomuxpad: %s_input_select %p <= %.8ux & %.8ux\n", signame[sig], PADDR(reg), val, mask);
*reg = (*reg & ~mask) | val;
}
uint
iomuxgpr(int gpr, uint set, uint mask)
{
u32int *reg = &iomuxc[IOMUXC_GPR_GPR0 + gpr];
if(mask == 0)
return *reg;
// iprint("iomuxgpr: gpr%d %p <= %.8ux & %.8ux\n", gpr, PADDR(reg), set, mask);
return *reg = (*reg & ~mask) | (set & mask);
}

View file

@ -14,13 +14,6 @@
extern Memimage *gscreen;
/* pinmux registers */
enum {
IOMUXC_GPR_GPR13 = 0x10034/4, /* GPR13 for MIPI_MUX_SEL */
MIPI_MUX_SEL = 1<<2,
MIPI_MUX_INV = 1<<3,
};
/* gpio registers */
enum {
GPIO_DR = 0x00/4,
@ -366,8 +359,6 @@ struct dsi_cfg {
/* base addresses, VIRTIO is at 0x30000000 physical */
static u32int *iomuxc = (u32int*)(VIRTIO + 0x330000);
static u32int *gpio1 = (u32int*)(VIRTIO + 0x200000);
static u32int *gpio3 = (u32int*)(VIRTIO + 0x220000);
@ -828,8 +819,8 @@ lcdinit(void)
/* pwm2_out: for panel backlight */
iomuxpad("pad_spdif_rx", "pwm2_out", nil);
/* lcdif to dpi=0, dcss=1 */
mr(iomuxc, IOMUXC_GPR_GPR13, 0, MIPI_MUX_SEL);
/* GPR13[MIPI_MUX_SEL]: 0 = LCDIF, 1 = DCSS */
iomuxgpr(13, 0, 1<<2);
setclkgate("gpio1.ipg_clk_s", 1);
setclkgate("gpio3.ipg_clk_s", 1);