7l: deal with huge (negative or > 24bit) register offsets, fix LACON, avoid DWORD in constant pool when we can sign extend
This commit is contained in:
cinap_lenrek
parent
15c3f45e5f
commit
8c95a221b0
3 changed files with 72 additions and 72 deletions
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@ -74,7 +74,6 @@ void
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asmout(Prog *p, Optab *o)
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{
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long o1, o2, o3, o4, o5, v, hi;
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ulong u;
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vlong d;
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int r, s, rf, rt, ra, nzcv, cond, i, as;
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Mask *mask;
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@ -223,8 +222,6 @@ asmout(Prog *p, Optab *o)
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case 13: /* addop $lcon, [R], R (64 bit literal); cmp $lcon,R -> addop $lcon,R, ZR */
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o1 = omovlit(AMOV, p, &p->from, REGTMP);
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if(!o1)
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break;
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rt = p->to.reg;
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if(p->to.type == D_NONE)
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rt = REGZERO;
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@ -427,8 +424,6 @@ asmout(Prog *p, Optab *o)
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case 28: /* logop $lcon, [R], R (64 bit literal) */
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o1 = omovlit(AMOV, p, &p->from, REGTMP);
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if(!o1)
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break;
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r = p->reg;
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if(r == NREG)
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r = p->to.reg;
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@ -448,10 +443,10 @@ asmout(Prog *p, Optab *o)
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if(s < 0)
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diag("unexpected long move, op %A tab %A\n%P", p->as, o->as, p);
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v = regoff(&p->to);
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if(v < 0)
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diag("negative large offset\n%P", p);
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if((v & ((1<<s)-1)) != 0)
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diag("misaligned offset\n%P", p);
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if(v < 0 || (v>>s) >= (1<<24))
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goto Hugestxr;
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hi = v - (v & (0xFFF<<s));
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if((hi & 0xFFF) != 0)
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diag("internal: miscalculated offset %ld [%d]\n%P", v, s, p);
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@ -468,10 +463,10 @@ asmout(Prog *p, Optab *o)
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if(s < 0)
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diag("unexpected long move, op %A tab %A\n%P", p->as, o->as, p);
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v = regoff(&p->from);
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if(v < 0)
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diag("negative large offset\n%P", p);
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if((v & ((1<<s)-1)) != 0)
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diag("misaligned offset\n%P", p);
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if(v < 0 || (v>>s) >= (1<<24))
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goto Hugeldxr;
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hi = v - (v & (0xFFF<<s));
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if((hi & 0xFFF) != 0)
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diag("internal: miscalculated offset %ld [%d]\n%P", v, s, p);
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@ -670,23 +665,23 @@ asmout(Prog *p, Optab *o)
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break;
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case 47: /* movT R,V(R) -> strT (huge offset) */
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o1 = omovlit(AMOVW, p, &p->to, REGTMP);
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if(!o1)
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break;
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Hugestxr:
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o1 = omovlit(AMOV, p, &p->to, REGTMP);
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r = p->to.reg;
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if(r == NREG)
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r = o->param;
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o2 = olsxrr(p->as, REGTMP,r, p->from.reg);
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o2 = LD2STR(olsxrr(p->as, REGTMP, r, p->from.reg));
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o2 |= 7<<13; // REGTMP.SX
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break;
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case 48: /* movT V(R), R -> ldrT (huge offset) */
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o1 = omovlit(AMOVW, p, &p->from, REGTMP);
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if(!o1)
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break;
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Hugeldxr:
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o1 = omovlit(AMOV, p, &p->from, REGTMP);
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r = p->from.reg;
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if(r == NREG)
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r = o->param;
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o2 = olsxrr(p->as, REGTMP,r, p->to.reg);
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o2 = olsxrr(p->as, REGTMP, r, p->to.reg);
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o2 |= 7<<13; // REGTMP.SX
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break;
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case 50: /* sys/sysl */
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@ -845,15 +840,11 @@ asmout(Prog *p, Optab *o)
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/* reloc ops */
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case 64: /* movT R,addr */
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o1 = omovlit(AMOV, p, &p->to, REGTMP);
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if(!o1)
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break;
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o2 = olsr12u(opstr12(p->as), 0, REGTMP, p->from.reg);
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break;
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case 65: /* movT addr,R */
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o1 = omovlit(AMOV, p, &p->from, REGTMP);
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if(!o1)
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break;
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o2 = olsr12u(opldr12(p->as), 0, REGTMP, p->to.reg);
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break;
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}
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@ -1572,8 +1563,7 @@ opldrpp(int a)
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static long
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olsxrr(int a, int b, int c, int d)
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{
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diag("need load/store extended register\n%P", curp);
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return -1;
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return opldrpp(a) | 1<<21 | b<<16 | 2<<10 | c<<5 | d;
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}
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static long
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@ -1598,7 +1588,6 @@ omovlit(int as, Prog *p, Adr *a, int dr)
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if(p->cond == nil){ /* not in literal pool */
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aclass(a);
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fprint(2, "omovlit add %lld (%#llux)\n", instoffset, instoffset);
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/* TO DO: could be clever, and use general constant builder */
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o1 = opirr(AADD);
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v = instoffset;
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@ -1606,6 +1595,8 @@ fprint(2, "omovlit add %lld (%#llux)\n", instoffset, instoffset);
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v >>= 12;
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o1 |= 1<<22; /* shift, by 12 */
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}
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if(v < 0 || v > 0xFFF)
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diag("literal out of range\n%P", p);
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o1 |= ((v& 0xFFF) << 10) | (REGZERO<<5) | dr;
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}else{
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fp = 0;
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@ -141,7 +141,7 @@ Optab optab[] =
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{ AWORD, C_NONE, C_NONE, C_ADDR, 14, 4, 0 },
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{ AMOVW, C_LCON, C_NONE, C_REG, 12, 4, 0, LFROM },
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{ AMOV, C_LCON, C_NONE, C_REG, 12, 4, 0, LFROM },
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{ AMOV, C_LCON, C_NONE, C_REG, 12, 4, 0, LFROM },
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{ AMOVW, C_REG, C_NONE, C_ADDR, 64, 8, 0, LTO },
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{ AMOVB, C_REG, C_NONE, C_ADDR, 64, 8, 0, LTO },
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@ -236,54 +236,62 @@ Optab optab[] =
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{ AMOV, C_UOREG32K,C_NONE, C_REG, 21, 4, REGSP },
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{ AMOV, C_NSOREG,C_NONE, C_REG, 21, 4, REGSP },
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/* long displacement store */
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{ AMOVB, C_REG, C_NONE, C_LEXT, 30, 8, REGSB }, //
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{ AMOVB, C_REG, C_NONE, C_LAUTO, 30, 8, REGSP }, //
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{ AMOVB, C_REG, C_NONE, C_LOREG, 30, 8, 0 }, //
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{ AMOVH, C_REG, C_NONE, C_LEXT, 30, 8, REGSB }, //
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{ AMOVH, C_REG, C_NONE, C_LAUTO, 30, 8, REGSP }, //
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{ AMOVH, C_REG, C_NONE, C_LOREG, 30, 8, 0 }, //
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{ AMOVW, C_REG, C_NONE, C_LEXT, 30, 8, REGSB }, //
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{ AMOVW, C_REG, C_NONE, C_LAUTO, 30, 8, REGSP }, //
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{ AMOVW, C_REG, C_NONE, C_LOREG, 30, 8, 0 }, //
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{ AMOV, C_REG, C_NONE, C_LEXT, 30, 8, REGSB }, //
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{ AMOV, C_REG, C_NONE, C_LAUTO, 30, 8, REGSP }, //
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{ AMOV, C_REG, C_NONE, C_LOREG, 30, 8, 0 }, //
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/* large displacement store */
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{ AMOVB, C_REG, C_NONE, C_LEXT, 30, 8, REGSB, LTO },
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{ AMOVB, C_REG, C_NONE, C_LAUTO, 30, 8, REGSP, LTO },
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{ AMOVB, C_REG, C_NONE, C_LOREG, 30, 8, 0, LTO },
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{ AMOVBU, C_REG, C_NONE, C_LEXT, 30, 8, REGSB, LTO },
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{ AMOVBU, C_REG, C_NONE, C_LAUTO, 30, 8, REGSP, LTO },
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{ AMOVBU, C_REG, C_NONE, C_LOREG, 30, 8, 0, LTO },
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/* long displacement load */
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{ AMOVB, C_LEXT, C_NONE, C_REG, 31, 8, REGSB }, //
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{ AMOVB, C_LAUTO,C_NONE, C_REG, 31, 8, REGSP }, //
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{ AMOVB, C_LOREG,C_NONE, C_REG, 31, 8, 0 }, //
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{ AMOVB, C_LOREG,C_NONE, C_REG, 31, 8, 0 }, //
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{ AMOVH, C_LEXT, C_NONE, C_REG, 31, 8, REGSB }, //
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{ AMOVH, C_LAUTO,C_NONE, C_REG, 31, 8, REGSP }, //
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{ AMOVH, C_LOREG,C_NONE, C_REG, 31, 8, 0 }, //
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{ AMOVH, C_LOREG,C_NONE, C_REG, 31, 8, 0 }, //
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{ AMOVW, C_LEXT, C_NONE, C_REG, 31, 8, REGSB }, //
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{ AMOVW, C_LAUTO,C_NONE, C_REG, 31, 8, REGSP }, //
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{ AMOVW, C_LOREG,C_NONE, C_REG, 31, 8, 0 }, //
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{ AMOVW, C_LOREG,C_NONE, C_REG, 31, 8, 0 }, //
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{ AMOV, C_LEXT, C_NONE, C_REG, 31, 8, REGSB }, //
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{ AMOV, C_LAUTO,C_NONE, C_REG, 31, 8, REGSP }, //
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{ AMOV, C_LOREG,C_NONE, C_REG, 31, 8, 0 }, //
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{ AMOV, C_LOREG,C_NONE, C_REG, 31, 8, 0 }, //
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{ AMOVH, C_REG, C_NONE, C_LEXT, 30, 8, REGSB, LTO },
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{ AMOVH, C_REG, C_NONE, C_LAUTO, 30, 8, REGSP, LTO },
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{ AMOVH, C_REG, C_NONE, C_LOREG, 30, 8, 0, LTO },
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/* load long effective stack address (load long offset and add) */
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{ AMOV, C_LACON,C_NONE, C_REG, 34, 8, REGSP, LFROM }, //
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{ AMOVW, C_REG, C_NONE, C_LEXT, 30, 8, REGSB, LTO },
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{ AMOVW, C_REG, C_NONE, C_LAUTO, 30, 8, REGSP, LTO },
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{ AMOVW, C_REG, C_NONE, C_LOREG, 30, 8, 0, LTO },
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{ AMOV, C_REG, C_NONE, C_LEXT, 30, 8, REGSB, LTO },
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{ AMOV, C_REG, C_NONE, C_LAUTO, 30, 8, REGSP, LTO },
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{ AMOV, C_REG, C_NONE, C_LOREG, 30, 8, 0, LTO },
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/* large displacement load */
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{ AMOVB, C_LEXT, C_NONE, C_REG, 31, 8, REGSB, LFROM },
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{ AMOVB, C_LAUTO,C_NONE, C_REG, 31, 8, REGSP, LFROM },
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{ AMOVB, C_LOREG,C_NONE, C_REG, 31, 8, 0, LFROM },
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{ AMOVBU, C_LEXT, C_NONE, C_REG, 31, 8, REGSB, LFROM },
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{ AMOVBU, C_LAUTO,C_NONE, C_REG, 31, 8, REGSP, LFROM },
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{ AMOVBU, C_LOREG,C_NONE, C_REG, 31, 8, 0, LFROM },
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{ AMOVH, C_LEXT, C_NONE, C_REG, 31, 8, REGSB, LFROM },
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{ AMOVH, C_LAUTO,C_NONE, C_REG, 31, 8, REGSP, LFROM },
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{ AMOVH, C_LOREG,C_NONE, C_REG, 31, 8, 0, LFROM },
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{ AMOVW, C_LEXT, C_NONE, C_REG, 31, 8, REGSB, LFROM },
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{ AMOVW, C_LAUTO,C_NONE, C_REG, 31, 8, REGSP, LFROM },
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{ AMOVW, C_LOREG,C_NONE, C_REG, 31, 8, 0, LFROM },
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{ AMOV, C_LEXT, C_NONE, C_REG, 31, 8, REGSB, LFROM },
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{ AMOV, C_LAUTO,C_NONE, C_REG, 31, 8, REGSP, LFROM },
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{ AMOV, C_LOREG,C_NONE, C_REG, 31, 8, 0, LFROM },
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/* load large effective stack address (load large offset and add) */
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{ AMOV, C_LACON,C_NONE, C_REG, 34, 8, REGSP, LFROM },
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/* pre/post-indexed load (unscaled, signed 9-bit offset) */
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{ AMOV, C_XPOST, C_NONE, C_REG, 22, 4, 0 },
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{ AMOVW, C_XPOST, C_NONE, C_REG, 22, 4, 0 },
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{ AMOVH, C_XPOST, C_NONE, C_REG, 22, 4, 0 },
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{ AMOVB, C_XPOST, C_NONE, C_REG, 22, 4, 0 },
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{ AMOVH, C_XPOST, C_NONE, C_REG, 22, 4, 0 },
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{ AMOVB, C_XPOST, C_NONE, C_REG, 22, 4, 0 },
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{ AMOVBU, C_XPOST, C_NONE, C_REG, 22, 4, 0 },
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{ AFMOVS, C_XPOST, C_NONE, C_FREG, 22, 4, 0 },
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{ AFMOVD, C_XPOST, C_NONE, C_FREG, 22, 4, 0 },
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{ AMOV, C_XPRE, C_NONE, C_REG, 22, 4, 0 },
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{ AMOVW, C_XPRE, C_NONE, C_REG, 22, 4, 0 },
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{ AMOVH, C_XPRE, C_NONE, C_REG, 22, 4, 0 },
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{ AMOVB, C_XPRE, C_NONE, C_REG, 22, 4, 0 },
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{ AMOVH, C_XPRE, C_NONE, C_REG, 22, 4, 0 },
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{ AMOVB, C_XPRE, C_NONE, C_REG, 22, 4, 0 },
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{ AMOVBU, C_XPRE, C_NONE, C_REG, 22, 4, 0 },
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{ AFMOVS, C_XPRE, C_NONE, C_FREG, 22, 4, 0 },
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{ AFMOVD, C_XPRE, C_NONE, C_FREG, 22, 4, 0 },
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@ -200,23 +200,21 @@ void
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addpool(Prog *p, Adr *a)
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{
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Prog *q, t;
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int c, sz;
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int sz;
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c = aclass(a);
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t = zprg;
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t.as = AWORD;
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sz = 4;
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if(p->as == AMOV || (cmp(C_VCON, c) && (ulong)(a->offset & 0xFFFFFFFF) != a->offset)) {
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t.as = ADWORD;
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sz = 8;
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}
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switch(c) {
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switch(aclass(a)) {
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default:
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if(p->as == AMOV && (a->name == D_EXTERN || a->name == D_STATIC)
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|| (a->offset >> 32) != 0 && (a->offset >> 31) != -1){
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t.as = ADWORD;
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sz = 8;
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}
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t.to = *a;
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break;
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case C_PSAUTO:
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case C_PPAUTO:
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case C_UAUTO4K:
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@ -237,9 +235,11 @@ addpool(Prog *p, Adr *a)
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case C_NSOREG:
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case C_NPOREG:
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case C_LOREG:
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case C_LACON:
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if((instoffset >> 32) != 0 && (instoffset >> 31) != -1)
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diag("offset too large\n%P", p);
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t.to.type = D_CONST;
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t.to.offset = instoffset;
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sz = 4;
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break;
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}
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@ -741,7 +741,8 @@ oplook(Prog *p)
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if(c1[o->a1])
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if(c3[o->a3]) {
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if(0)
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print("%P\t-> %d (%d %d %d)\n", p, o->type, o->a1, o->a2, o->a3);
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print("%P\t-> %d (%d %d %d)\n", p, o->type,
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o->a1, o->a2, o->a3);
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p->optab = (o-optab)+1;
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return o;
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}
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