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bcm64/sdhc: add *emmc2bus kernel parameter to set dma dram bus address

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On the raspberry pi 4, depending on the chip revision,
the emmc2 controller has different dram bus address window,
so make it configurable.
This commit is contained in:
cinap_lenrek 2021-11-07 17:47:09 +00:00
parent a2baa86348
commit 80268af29e
1 changed files with 9 additions and 7 deletions
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16
sys/src/9/bcm64/sdhc.c
View file

@ -199,11 +199,11 @@ enum {
struct Ctlr { struct Ctlr {
Rendez r; Rendez r;
Rendez cardr;
int fastclock; int fastclock;
ulong extclk; ulong extclk;
int appcmd; int appcmd;
Adma *dma; Adma *dma;
uintptr busdram;
}; };
static Ctlr emmc; static Ctlr emmc;
@ -247,7 +247,7 @@ dmaalloc(void *addr, int len)
p->desc |= len<<OLength | End | Int; p->desc |= len<<OLength | End | Int;
else else
p->desc |= Maxdma<<OLength; p->desc |= Maxdma<<OLength;
p->addr = dmaaddr((void*)a); p->addr = emmc.busdram + (PADDR(a) - PHYSDRAM);
a += Maxdma; a += Maxdma;
len -= Maxdma; len -= Maxdma;
n--; n--;
@ -293,7 +293,11 @@ emmcinit(void)
{ {
u32int *r; u32int *r;
ulong clk; ulong clk;
char *s;
emmc.busdram = soc.busdram;
if((s = getconf("*emmc2bus")) != nil)
emmc.busdram = strtoull(s, nil, 16);
clk = getclkrate(ClkEmmc2); clk = getclkrate(ClkEmmc2);
if(clk == 0){ if(clk == 0){
clk = Extfreq; clk = Extfreq;
@ -401,9 +405,9 @@ emmccmd(u32int cmd, u32int arg, u32int *resp)
WR(Interrupt, i); WR(Interrupt, i);
} }
WR(Cmdtm, c); WR(Cmdtm, c);
now = m->ticks; now = MACHP(0)->ticks;
while(((i=r[Interrupt])&(Cmddone|Err)) == 0) while(((i=r[Interrupt])&(Cmddone|Err)) == 0)
if(m->ticks-now > HZ) if(MACHP(0)->ticks - now > HZ)
break; break;
if((i&(Cmddone|Err)) != Cmddone){ if((i&(Cmddone|Err)) != Cmddone){
if((i&~(Err|Cardintr)) != Ctoerr) if((i&~(Err|Cardintr)) != Ctoerr)
@ -507,7 +511,7 @@ emmciosetup(int write, void *buf, int bsize, int bcount)
cachedwbse(buf, len); cachedwbse(buf, len);
else else
cachedwbinvse(buf, len); cachedwbinvse(buf, len);
WR(Dmadesc, dmaaddr(emmc.dma)); WR(Dmadesc, emmc.busdram + (PADDR(emmc.dma) - PHYSDRAM));
okay(1); okay(1);
} }
@ -549,8 +553,6 @@ mmcinterrupt(Ureg*, void*)
i = r[Interrupt]; i = r[Interrupt];
if(i&(Datadone|Err)) if(i&(Datadone|Err))
wakeup(&emmc.r); wakeup(&emmc.r);
if(i&Cardintr)
wakeup(&emmc.cardr);
WR(Irpten, r[Irpten] & ~i); WR(Irpten, r[Irpten] & ~i);
} }