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pckernel: use constants instead of hardcoding cpuid bits in various places

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This commit is contained in:
cinap_lenrek 2012-08-17 04:03:51 +02:00
parent 81954dbf25
commit 7fdf820589
7 changed files with 12 additions and 11 deletions
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5
sys/src/9/pc/dat.h
View file

@ -283,7 +283,8 @@ enum {
/* dx */
Fpuonchip = 1<<0,
// Pse = 1<<3, /* page size extensions */
Vmex = 1<<1, /* virtual-mode extensions */
Pse = 1<<3, /* page size extensions */
Tsc = 1<<4, /* time-stamp counter */
Cpumsr = 1<<5, /* model-specific registers, rdmsr/wrmsr */
Pae = 1<<6, /* physical-addr extensions */
@ -292,7 +293,7 @@ enum {
Cpuapic = 1<<9,
Mtrr = 1<<12, /* memory-type range regs. */
Pge = 1<<13, /* page global extension */
// Pse2 = 1<<17, /* more page size extensions */
Pse2 = 1<<17, /* more page size extensions */
Clflush = 1<<19,
Acpif = 1<<22, /* therm control msr */
Mmx = 1<<23,

4
sys/src/9/pc/devarch.c
View file

@ -809,9 +809,9 @@ cpuidentify(void)
* are supported enable them in CR4 and clear any other set extensions.
* If machine check was enabled clear out any lingering status.
*/
if(m->cpuiddx & (Pge|Mce|0x8)){
if(m->cpuiddx & (Pge|Mce|Pse)){
cr4 = 0;
if(m->cpuiddx & 0x08)
if(m->cpuiddx & Pse)
cr4 |= 0x10; /* page size extensions */
if(p = getconf("*nomce"))
nomce = strtoul(p, 0, 0);

2
sys/src/9/pc/main.c
View file

@ -523,7 +523,7 @@ matherror(Ureg *ur, void*)
* a write cycle to port 0xF0 clears the interrupt latch attached
* to the error# line from the 387
*/
if(!(m->cpuiddx & 0x01))
if(!(m->cpuiddx & Fpuonchip))
outb(0xF0, 0xFF);
/*

4
sys/src/9/pc/memory.c
View file

@ -473,9 +473,9 @@ ramscan(ulong maxmem)
table = &m->pdb[PDX(KADDR(pa - 4*MB))];
if(nvalid[MemUPA] == (4*MB)/BY2PG)
*table = 0;
else if(nvalid[MemRAM] == (4*MB)/BY2PG && (m->cpuiddx & 0x08))
else if(nvalid[MemRAM] == (4*MB)/BY2PG && (m->cpuiddx & Pse))
*table = (pa - 4*MB)|PTESIZE|PTEWRITE|PTEVALID;
else if(nvalid[MemUMB] == (4*MB)/BY2PG && (m->cpuiddx & 0x08))
else if(nvalid[MemUMB] == (4*MB)/BY2PG && (m->cpuiddx & Pse))
*table = (pa - 4*MB)|PTESIZE|PTEWRITE|PTEUNCACHED|PTEVALID;
else{
*table = map|PTEWRITE|PTEVALID;

2
sys/src/9/pc/mmu.c
View file

@ -712,7 +712,7 @@ pdbmap(ulong *pdb, ulong pa, ulong va, int size)
flag = pa&0xFFF;
pa &= ~0xFFF;
if((MACHP(0)->cpuiddx & 0x08) && (getcr4() & 0x10))
if((MACHP(0)->cpuiddx & Pse) && (getcr4() & 0x10))
pse = 1;
else
pse = 0;

2
sys/src/9/pc/mp.c
View file

@ -99,7 +99,7 @@ checkmtrr(void)
/*
* If there are MTRR registers, snarf them for validation.
*/
if(!(m->cpuiddx & 0x1000))
if(!(m->cpuiddx & Mtrr))
return;
rdmsr(0x0FE, &m->mtrrcap);

4
sys/src/9/pc/trap.c
View file

@ -535,9 +535,9 @@ dumpregs(Ureg* ureg)
*/
iprint(" CR0 %8.8lux CR2 %8.8lux CR3 %8.8lux",
getcr0(), getcr2(), getcr3());
if(m->cpuiddx & 0x9A){
if(m->cpuiddx & (Mce|Tsc|Pse|Vmex)){
iprint(" CR4 %8.8lux", getcr4());
if((m->cpuiddx & 0xA0) == 0xA0){
if((m->cpuiddx & (Mce|Cpumsr)) == (Mce|Cpumsr)){
rdmsr(0x00, &mca);
rdmsr(0x01, &mct);
iprint("\n MCA %8.8llux MCT %8.8llux", mca, mct);