etheriwl: support for WiFi Link 4965
This commit is contained in:
cinap_lenrek
parent
8d271549cd
commit
78fc90ec86
1 changed files with 75 additions and 87 deletions
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@ -19,7 +19,6 @@
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#include "wifi.h"
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enum {
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Ntxlog = 8,
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Ntx = 1<<Ntxlog,
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Nrxlog = 8,
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@ -197,16 +196,18 @@ enum {
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enum {
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SchedBase = 0xa02c00,
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SchedSramAddr = SchedBase,
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SchedDramAddr5000 = SchedBase+0x008,
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SchedDramAddr4965 = SchedBase+0x010,
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SchedTxFact5000 = SchedBase+0x010,
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SchedTxFact4965 = SchedBase+0x01c,
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SchedQueueRdptr4965 = SchedBase+0x064, // +q*4
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SchedQueueRdptr5000 = SchedBase+0x068, // +q*4
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SchedQChainSel4965 = SchedBase+0x0d0,
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SchedIntrMask4965 = SchedBase+0x0e4,
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SchedQChainSel5000 = SchedBase+0x0e8,
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SchedQueueStatus4965 = SchedBase+0x104, // +q*4
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SchedDramAddr5000 = SchedBase+0x008,
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SchedTxFact5000 = SchedBase+0x010,
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SchedQueueRdptr5000 = SchedBase+0x068, // +q*4
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SchedQChainSel5000 = SchedBase+0x0e8,
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SchedIntrMask5000 = SchedBase+0x108,
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SchedQueueStatus5000 = SchedBase+0x10c, // +q*4
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SchedAggrSel5000 = SchedBase+0x248,
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@ -215,11 +216,9 @@ enum {
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enum {
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SchedCtxOff4965 = 0x380,
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SchedCtxLen4965 = 416,
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SchedTransTblOff4965 = 0x500,
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SchedCtxOff5000 = 0x600,
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SchedCtxLen5000 = 512,
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SchedTransTblOff5000 = 0x7e0,
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};
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enum {
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@ -253,8 +252,6 @@ typedef struct RXQ RXQ;
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typedef struct Ctlr Ctlr;
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typedef struct Ctlrtype Ctlrtype;
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struct FWSect
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{
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uchar *data;
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@ -378,39 +375,16 @@ enum {
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Type6005 = 11,
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};
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struct Ctlrtype
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{
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char *fwname;
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};
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static Ctlrtype ctlrtype[16] = {
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[Type4965] {
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.fwname = "iwn-4965",
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},
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[Type5300] {
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.fwname = "iwn-5000",
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},
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[Type5350] {
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.fwname = "iwn-5000",
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},
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[Type5150] {
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.fwname = "iwn-5150",
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},
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[Type5100] {
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.fwname = "iwn-5000",
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},
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[Type1000] {
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.fwname = "iwn-1000",
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},
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[Type6000] {
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.fwname = "iwn-6000",
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},
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[Type6050] {
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.fwname = "iwn-6050",
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},
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[Type6005] {
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.fwname = "iwn-6005",
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},
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static char *fwname[16] = {
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[Type4965] "iwn-4965",
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[Type5300] "iwn-5000",
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[Type5350] "iwn-5000",
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[Type5150] "iwn-5150",
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[Type5100] "iwn-5000",
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[Type1000] "iwn-1000",
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[Type6000] "iwn-6000",
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[Type6050] "iwn-6050",
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[Type6005] "iwn-6005",
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};
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#define csr32r(c, r) (*((c)->nic+((r)/4)))
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@ -754,7 +728,7 @@ Tooshort:
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return "bad firmware signature";
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p += 4;
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strncpy(i->descr, (char*)p, 64);
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i->descr[sizeof(i->descr)-1] = 0;
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i->descr[64] = 0;
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p += 64;
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i->rev = get32(p); p += 4;
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i->build = get32(p); p += 4;
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@ -776,7 +750,7 @@ Tooshort:
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default:s = &dummy;
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}
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p += 2;
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if(get16(p) != alt)
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if(get16(p) != 0 && get16(p) != alt)
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s = &dummy;
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p += 2;
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s->size = get32(p); p += 4;
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@ -942,6 +916,7 @@ bootfirmware(Ctlr *ctlr)
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return err;
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if((err = loadfirmware1(ctlr, 0x00800000, fw->main.data.data, fw->main.data.size)) != nil)
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return err;
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csr32w(ctlr, Reset, 0);
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goto bootmain;
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}
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@ -966,6 +941,12 @@ bootfirmware(Ctlr *ctlr)
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prphwrite(ctlr, BsmDramTextAddr, PCIWADDR(p) >> 4);
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prphwrite(ctlr, BsmDramTextSize, fw->init.text.size);
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nicunlock(ctlr);
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if((err = niclock(ctlr)) != nil){
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free(dma);
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return err;
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}
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p = fw->boot.text.data;
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n = fw->boot.text.size/4;
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for(i=0; i<n; i++, p += 4)
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@ -1019,7 +1000,6 @@ bootfirmware(Ctlr *ctlr)
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nicunlock(ctlr);
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bootmain:
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csr32w(ctlr, Reset, 0);
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if(irqwait(ctlr, Ierr|Ialive, 5000) != Ialive){
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free(dma);
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return "main firmware boot failed";
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@ -1119,17 +1099,18 @@ flushq(Ctlr *ctlr, uint qid)
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}
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static void
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flushcmd(Ctlr *ctlr)
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{
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flushq(ctlr, 4);
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}
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static void
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cmd(Ctlr *ctlr, uint code, uchar *data, int size)
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{
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qcmd(ctlr, 4, code, data, size, nil);
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}
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static void
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flushcmd(Ctlr *ctlr)
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{
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flushq(ctlr, 4);
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}
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static void
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setled(Ctlr *ctlr, int which, int on, int off)
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@ -1173,8 +1154,8 @@ postboot(Ctlr *ctlr)
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}
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ctlr->sched.base = prphread(ctlr, SchedSramAddr);
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for(i=0; i < ctxlen/4; i++)
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memwrite(ctlr, ctlr->sched.base + ctxoff + i*4, 0);
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for(i=0; i < ctxlen; i += 4)
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memwrite(ctlr, ctlr->sched.base + ctxoff + i, 0);
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prphwrite(ctlr, dramaddr, PCIWADDR(ctlr->sched.s)>>10);
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@ -1185,7 +1166,7 @@ postboot(Ctlr *ctlr)
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prphwrite(ctlr, SchedQChainSel5000, 0xfffef);
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prphwrite(ctlr, SchedAggrSel5000, 0);
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for(q=0; q<nelem(ctlr->tx); q++){
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for(q=0; q<20; q++){
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prphwrite(ctlr, SchedQueueRdptr5000 + q*4, 0);
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csr32w(ctlr, HbusTargWptr, q << 8);
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@ -1217,25 +1198,26 @@ postboot(Ctlr *ctlr)
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/* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
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for(q=0; q<7; q++){
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static uchar qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
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if(ctlr->type != Type4965)
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if(ctlr->type != Type4965){
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static uchar qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
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prphwrite(ctlr, SchedQueueStatus5000 + q*4, 0x00ff0018 | qid2fifo[q]);
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else
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prphwrite(ctlr, SchedQueueStatus4965 + q*4, 0x0007fc01 | qid2fifo[q]);
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} else {
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static uchar qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
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prphwrite(ctlr, SchedQueueStatus4965 + q*4, 0x0007fc01 | qid2fifo[q]<<1);
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}
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}
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nicunlock(ctlr);
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if(ctlr->type != Type5150){
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memset(c, 0, sizeof(c));
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c[0] = 15; /* code */
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c[1] = 0; /* grup */
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c[2] = 1; /* ngroup */
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c[3] = 1; /* isvalid */
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put16(c+4, ctlr->eeprom.crystal);
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cmd(ctlr, 176, c, 8);
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}
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if(ctlr->type != Type4965){
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if(ctlr->type != Type5150){
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memset(c, 0, sizeof(c));
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c[0] = 15; /* code */
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c[1] = 0; /* grup */
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c[2] = 1; /* ngroup */
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c[3] = 1; /* isvalid */
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put16(c+4, ctlr->eeprom.crystal);
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cmd(ctlr, 176, c, 8);
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}
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put32(c, ctlr->rfcfg.txantmask & 7);
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cmd(ctlr, 152, c, 4);
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}
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@ -1266,15 +1248,15 @@ addnode(Ctlr *ctlr, uchar id, uchar *addr)
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p += 8; /* tcs */
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p += 8; /* rxmic */
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p += 8; /* txmic */
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p += 4; /* htflags */
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p += 4; /* mask */
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p += 2; /* disable tid */
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p += 2; /* reserved */
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p++; /* add ba tid */
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p++; /* del ba tid */
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p += 2; /* add ba ssn */
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p += 4; /* reserved */
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}
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p += 4; /* htflags */
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p += 4; /* mask */
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p += 2; /* disable tid */
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p += 2; /* reserved */
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p++; /* add ba tid */
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p++; /* del ba tid */
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p += 2; /* add ba ssn */
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p += 4; /* reserved */
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cmd(ctlr, 24, c, p - c);
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}
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@ -1344,6 +1326,7 @@ rxon(Ether *edev, Wnode *bss)
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p += 2; /* reserved */
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}
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cmd(ctlr, 16, c, p - c);
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if(ctlr->bcastnodeid == -1){
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ctlr->bcastnodeid = (ctlr->type != Type4965) ? 15 : 31;
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addnode(ctlr, ctlr->bcastnodeid, edev->bcast);
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@ -1617,10 +1600,10 @@ iwlattach(Ether *edev)
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ctlr->wifi = wifiattach(edev, transmit);
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if(ctlr->fw == nil){
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fw = readfirmware(ctlrtype[ctlr->type].fwname);
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fw = readfirmware(fwname[ctlr->type]);
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print("#l%d: firmware: %s, rev %ux, build %ud, size %ux+%ux+%ux+%ux+%ux\n",
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edev->ctlrno,
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ctlrtype[ctlr->type].fwname,
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fwname[ctlr->type],
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fw->rev, fw->build,
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fw->main.text.size, fw->main.data.size,
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fw->init.text.size, fw->init.data.size,
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@ -1699,18 +1682,20 @@ iwlattach(Ether *edev)
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if((err = niclock(ctlr)) != nil)
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error(err);
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prphwrite(ctlr, SchedTxFact5000, 0);
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if(ctlr->type != Type4965)
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prphwrite(ctlr, SchedTxFact5000, 0);
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else
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prphwrite(ctlr, SchedTxFact4965, 0);
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csr32w(ctlr, FhKwAddr, PCIWADDR(ctlr->kwpage) >> 4);
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for(q=0; q<nelem(ctlr->tx); q++)
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if(q < 15 || ctlr->type != Type4965)
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csr32w(ctlr, FhCbbcQueue + q*4, PCIWADDR(ctlr->tx[q].d) >> 8);
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for(q = (ctlr->type != Type4965) ? 19 : 15; q >= 0; q--)
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csr32w(ctlr, FhCbbcQueue + q*4, PCIWADDR(ctlr->tx[q].d) >> 8);
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nicunlock(ctlr);
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for(i=0; i<8; i++)
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if(i < 7 || ctlr->type != Type4965)
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csr32w(ctlr, FhTxConfig + i*32, FhTxConfigDmaEna | FhTxConfigDmaCreditEna);
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for(i = (ctlr->type != Type4965) ? 7 : 6; i >= 0; i--)
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csr32w(ctlr, FhTxConfig + i*32, FhTxConfigDmaEna | FhTxConfigDmaCreditEna);
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csr32w(ctlr, UcodeGp1Clr, UcodeGp1RfKill);
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csr32w(ctlr, UcodeGp1Clr, UcodeGp1CmdBlocked);
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@ -1820,9 +1805,10 @@ receive(Ctlr *ctlr)
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case 192: /* rx phy */
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break;
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case 195: /* rx done */
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if(d + 60 > b->lim)
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if(d + 2 > b->lim)
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break;
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d += 60;
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d += d[1];
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d += 56;
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case 193: /* mpdu rx done */
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if(d + 4 > b->lim)
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break;
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@ -1906,6 +1892,8 @@ iwlpci(void)
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switch(pdev->did){
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default:
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continue;
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case 0x4229: /* WiFi Link 4965 */
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case 0x4230: /* WiFi Link 4965 */
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case 0x4236: /* WiFi Link 5300 AGN */
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case 0x4237: /* Wifi Link 5100 AGN */
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break;
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@ -1940,7 +1928,7 @@ iwlpci(void)
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ctlr->pdev = pdev;
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ctlr->type = (csr32r(ctlr, Rev) >> 4) & 0xF;
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if(ctlrtype[ctlr->type].fwname == nil){
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if(fwname[ctlr->type] == nil){
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print("iwl: unsupported controller type %d\n", ctlr->type);
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vunmap(mem, pdev->mem[0].size);
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free(ctlr);
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