5l: fix shifts by zero

on arm32, we can do one of 4 shifts
by a constant:

	reg<<(0..31)
	reg>>(1..32)
	((u32int)reg)>>(1..32)
	reg ROT (0..31)

There's no way to encode a 0 bit right
shift,  so when encoding reg>>0, flip
it to the equivalent nop reg<<0, which
can be encoded.

sys/src/cmd/5l/asm.c

@@ -785,6 +785,9 @@ PP = p;
 
 	case 8:		/* sll $c,[R],R -> mov (R<<$c),R */
 		aclass(&p->from);
+		if((p->as == ASRL || p->as == ASRA) && instoffset == 0)
+			o1 = oprrr(ASLL, p->scond);
+		else
 			o1 = oprrr(p->as, p->scond);
 		r = p->reg;
 		if(r == NREG)