kernel: do not pull in atom.s from libc for arm kernels

- provide our own copy of cas() in l.s
- replace use of libc ainc()/adec() with portable incref()/decref()
This commit is contained in:
cinap_lenrek 2015-06-19 10:27:26 +02:00
parent e6220b39c9
commit 575015d2b0
7 changed files with 40 additions and 95 deletions

View file

@ -172,32 +172,6 @@ userureg(Ureg* ureg)
return (ureg->psr & PsrMask) == PsrMusr;
}
/*
* atomic ops
* make sure that we don't drag in the C library versions
*/
int
ainc(int *p)
{
int s, v;
s = splhi();
v = ++*p;
splx(s);
return v;
}
int
adec(int *p)
{
int s, v;
s = splhi();
v = --*p;
splx(s);
return v;
}
int
cas32(void* addr, u32int old, u32int new)
{

View file

@ -174,32 +174,6 @@ userureg(Ureg* ureg)
return (ureg->psr & PsrMask) == PsrMusr;
}
/*
* atomic ops
* make sure that we don't drag in the C library versions
*/
int
ainc(int *p)
{
int s, v;
s = splhi();
v = ++*p;
splx(s);
return v;
}
int
adec(int *p)
{
int s, v;
s = splhi();
v = --*p;
splx(s);
return v;
}
int
cas32(void* addr, u32int old, u32int new)
{

View file

@ -246,8 +246,8 @@ mmurelease(Proc* proc)
panic("mmurelease: page->ref %d", page->ref);
pagechainhead(page);
}
if(proc->mmul2cache && palloc.r.p)
wakeup(&palloc.r);
if(proc->mmul2cache != nil)
pagechaindone();
proc->mmul2cache = nil;
mmul1empty();

View file

@ -145,26 +145,6 @@ casfail:
MOVW $0, R0
RET
TEXT ainc(SB), $-4
spinainc:
LDREX(0,1)
ADD $1, R1
STREX(0,1,2)
CMP.S $0, R2
B.NE spinainc
MOVW R1, R0
RET
TEXT adec(SB), $-4
spinadec:
LDREX(0,1)
SUB $1, R1
STREX(0,1,2)
CMP.S $0, R2
B.NE spinadec
MOVW R1, R0
RET
TEXT setlabel(SB), 1, $-4
MOVW R13, 0(R0)
MOVW R14, 4(R0)

View file

@ -198,8 +198,8 @@ enum {
struct Diag {
Cacheline c0;
Lock;
long cnt;
long sync;
Ref cnt;
Ref sync;
Cacheline c1;
};
@ -466,10 +466,10 @@ stopcpu(uint cpu)
}
static void
synccpus(volatile long *cntp, int n)
synccpus(Ref *cntp, int n)
{
ainc(cntp);
while (*cntp < n)
incref(cntp);
while (cntp->ref < n)
;
/* all cpus should now be here */
}
@ -482,22 +482,22 @@ pass1(int pass, volatile Diag *dp)
if(m->machno == 0)
iprint(" %d", pass);
for (i = 1000*1000; --i > 0; ) {
ainc(&dp->cnt);
adec(&dp->cnt);
incref(&dp->cnt);
incref(&dp->cnt);
}
synccpus(&dp->sync, navailcpus);
/* all cpus are now here */
ilock(dp);
if(dp->cnt != 0)
panic("cpu%d: diag: failed w count %ld", m->machno, dp->cnt);
if(dp->cnt.ref != 0)
panic("cpu%d: diag: failed w count %ld", m->machno, dp->cnt.ref);
iunlock(dp);
synccpus(&dp->sync, 2 * navailcpus);
/* all cpus are now here */
adec(&dp->sync);
adec(&dp->sync);
decref(&dp->sync);
decref(&dp->sync);
}
/*
@ -532,8 +532,8 @@ l1diag(void)
iunlock(dp);
synccpus(&dp->sync, 2 * navailcpus);
adec(&dp->sync);
adec(&dp->sync);
decref(&dp->sync);
decref(&dp->sync);
/*
* cpus contend
@ -546,20 +546,20 @@ l1diag(void)
*/
synccpus(&dp->sync, navailcpus);
if(dp->sync < navailcpus || dp->sync >= 2 * navailcpus)
if(dp->sync.ref < navailcpus || dp->sync.ref >= 2 * navailcpus)
panic("cpu%d: diag: failed w dp->sync %ld", m->machno,
dp->sync);
if(dp->cnt != 0)
dp->sync.ref);
if(dp->cnt.ref != 0)
panic("cpu%d: diag: failed w dp->cnt %ld", m->machno,
dp->cnt);
dp->cnt.ref);
ilock(dp);
iprint(" cpu%d ok", m->machno);
iunlock(dp);
synccpus(&dp->sync, 2 * navailcpus);
adec(&dp->sync);
adec(&dp->sync);
decref(&dp->sync);
decref(&dp->sync);
l1cache->wb();
/*

View file

@ -14,8 +14,6 @@ extern int _uartprint(char*, ...);
#pragma varargck argpos _uartprint 1
extern long ainc(long *);
extern long adec(long *);
extern void allcacheinfo(Memcache *);
extern void allcacheson(void);
extern int archether(unsigned, Ether *);

View file

@ -843,6 +843,25 @@ GLOBL cpus_proceed+0(SB), $4
#include "cache.v7.s"
TEXT cas+0(SB),0,$12 /* r0 holds p */
MOVW ov+4(FP), R1
MOVW nv+8(FP), R2
spin:
/* LDREX 0(R0),R3 */
LDREX(0,3)
CMP.S R3, R1
BNE fail
/* STREX 0(R0),R2,R4 */
STREX(0,2,4)
CMP.S $0, R4
BNE spin
MOVW $1, R0
DMB
RET
fail:
MOVW $0, R0
RET
TEXT tas(SB), $-4 /* _tas(ulong *) */
/* returns old (R0) after modifying (R0) */
MOVW R0,R5