ether8169: support for RTL8168G
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906cc83c35
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52174db958
1 changed files with 12 additions and 1 deletions
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@ -120,6 +120,7 @@ enum { /* Tcr */
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Macv28 = 0x2c000000, /* RTL8111/8168B */
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Macv29 = 0x40800000, /* RTL8101/8102E */
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Macv30 = 0x24000000, /* RTL8101E? (untested) */
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Macv40 = 0x4c000000, /* RTL8168G */
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Ifg0 = 0x01000000, /* Interframe Gap 0 */
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Ifg1 = 0x02000000, /* Interframe Gap 1 */
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};
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@ -178,6 +179,7 @@ enum { /* Cplusc */
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Dac = 0x0010, /* PCI Dual Address Cycle Enable */
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Rxchksum = 0x0020, /* Receive Checksum Offload Enable */
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Rxvlan = 0x0040, /* Receive VLAN De-tagging Enable */
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Macstatdis = 0x0080, /* Disable Mac Statistics */
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Endian = 0x0200, /* Endian Mode */
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};
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@ -697,7 +699,15 @@ rtl8169init(Ether* edev)
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cplusc = csr16r(ctlr, Cplusc);
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cplusc &= ~(Endian|Rxchksum);
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cplusc |= Txenb|Rxenb|Mulrw;
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cplusc |= Txenb|Mulrw;
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switch(ctlr->macv){
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case Macv40:
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cplusc |= Macstatdis;
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break;
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default:
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cplusc |= Rxenb;
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break;
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}
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csr16w(ctlr, Cplusc, cplusc);
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csr32w(ctlr, Tnpds+4, 0);
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@ -1040,6 +1050,7 @@ vetmacv(Ctlr *ctlr, uint *macv)
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case Macv28:
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case Macv29:
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case Macv30:
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case Macv40:
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break;
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}
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return 0;
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