From 5149f204b78b7969c0cb865ff376fc21a2c50297 Mon Sep 17 00:00:00 2001
From: cinap_lenrek <cinap_lenrek@felloff.net>
Date: Tue, 8 Dec 2020 17:16:12 +0100
Subject: [PATCH] plan9.ini(8): document *nomtrr= and order the table

---
 sys/man/8/plan9.ini | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/sys/man/8/plan9.ini b/sys/man/8/plan9.ini
index d89cf713c..039935f45 100644
--- a/sys/man/8/plan9.ini
+++ b/sys/man/8/plan9.ini
@@ -815,11 +815,13 @@ This deprecated option is rarely necessary in newer kernels.
 This limits the maximum amount of memory (in megabytes) the graphics
 image memory pool can grow. The default is unlimited for terminals
 and cpu servers.
-.SS \fL*nomce=\fIvalue\fP
+.SS \fL*noavx=\fP
+Disables AVX and AVX2 on AMD64 CPUs.
+.SS \fL*nomce=\fP
 If machine check exceptions are supported by the processor,
 then they are enabled by default.
-Setting this variable to
-.B 1
+Setting
+.B *nomce
 causes them to be disabled even when available.
 .SS \fL*nomp=\fP
 A multiprocessor machine will enable all processors by default.
@@ -836,7 +838,12 @@ processors.
 .SS \fL*apicdebug=\fP
 Prints a summary of the multiprocessor APIC interrupt configuration.
 .SS \fL*nomsi=\fP
-Disables message signaled interrupts.
+Disables message signaled interrupts for PCI devices.
+This option has no effect when
+.B *nomp
+is set.
+.SS \fL*nomtrr=\fP
+Disables memory type range register (MTRR) support when set. (debug)
 .SS \fL*notsc=\fP
 Disables the use of the per processor timestamp counter registers
 as high resolution clock.
@@ -898,8 +905,6 @@ The main feature of the interface is the ability to watch
 battery life (see
 .IR stats (8)).
 It is not on by default because it causes problems on some laptops.
-.SS \fL*noavx=\fP
-Disables AVX and AVX2 on AMD64 CPUs.
 .SS USB
 .SS \fL*nousbprobe=\fP
 Disable USB host controller detection.