usbdwc: enable Slowbuilkin workarround, improve split transaction timing, handle erroring sleep(), debugging
i'v been seeing the error condition described above in the Slowbulkin comment. so i'm enabling the work arround which seems to fix the lockup. in the split transaction case where we want to start the transaction at frame start, acquire the ctlr lock *before* checking if we are in the right frame number. so the start will happen atomically. checking the software ctlr->sofchan instead of checking the interrupt mask register seems to be quicker. setting the haint mask bit for the chan under ctlr lock in chanio() instead of chanwait() avoids needing to acquire the ctlr lock twice. mask wakechan bits with busychan bitmap in interrupt handlers so we will not try to wake up released chans by accident. sleep() and tsleep() might get interrupted so we have to release the split qlock in the split transaction case and in all cases, make sure to halt the channel before release. add some common debug functions to dump channel and controller registers.
This commit is contained in:
cinap_lenrek
parent
21ce34bd7f
commit
4d96c40a47
1 changed files with 122 additions and 79 deletions
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@ -41,10 +41,9 @@ enum
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* when the controller is reading a sequence of bulk input
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* packets in DMA mode. Setting Slowbulkin=1 will avoid the
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* lockup by reading packets individually with an interrupt
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* after each. More recent chips don't seem to exhibit the
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* problem, so it's probably safe to leave this off now.
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* after each.
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*/
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Slowbulkin = 0,
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Slowbulkin = 1,
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};
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typedef struct Ctlr Ctlr;
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@ -54,13 +53,13 @@ struct Ctlr {
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Lock;
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Dwcregs *regs; /* controller registers */
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int nchan; /* number of host channels */
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ulong chanbusy; /* bitmap of in-use channels */
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uint chanbusy; /* bitmap of in-use channels */
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Lock chanlock; /* serialise access to chanbusy */
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QLock split; /* serialise split transactions */
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int splitretry; /* count retries of Nyet */
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int sofchan; /* bitmap of channels waiting for sof */
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int wakechan; /* bitmap of channels to wakeup after fiq */
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int debugchan; /* bitmap of channels for interrupt debug */
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uint sofchan; /* bitmap of channels waiting for sof */
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uint wakechan; /* bitmap of channels to wakeup after fiq */
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uint debugchan; /* bitmap of channels for interrupt debug */
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Rendez *chanintr; /* sleep till interrupt on channel N */
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};
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@ -75,13 +74,17 @@ struct Epio {
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};
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static Ctlr dwc;
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static int debug;
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static int debug = 0;
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static char Ebadlen[] = "bad usb request length";
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static void clog(Ep *ep, Hostchan *hc);
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static void logdump(Ep *ep);
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static void dumpctlr(Ctlr *ctlr);
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static void dumphchan(Ctlr *ctlr, Hostchan *hc);
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static void dump(Hci *hp);
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static void
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filock(Lock *l)
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{
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@ -102,7 +105,8 @@ static Hostchan*
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chanalloc(Ep *ep)
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{
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Ctlr *ctlr;
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int bitmap, i;
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int i;
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uint bitmap;
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static int first;
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ctlr = ep->hp->aux;
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@ -123,13 +127,13 @@ retry:
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}
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static void
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chanrelease(Ep *ep, Hostchan *chan)
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chanrelease(Ep *ep, Hostchan *hc)
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{
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Ctlr *ctlr;
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int i;
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ctlr = ep->hp->aux;
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i = chan - ctlr->regs->hchan;
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i = hc - ctlr->regs->hchan;
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lock(&ctlr->chanlock);
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ctlr->chanbusy &= ~(1<<i);
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unlock(&ctlr->chanlock);
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@ -188,74 +192,68 @@ chansetup(Hostchan *hc, Ep *ep)
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hc->hcint = ~0;
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}
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static void
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chanhalt(Ep *ep, Hostchan *hc)
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{
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ulong start;
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hc->hcintmsk = 0;
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hc->hcchar |= Chdis;
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start = m->ticks;
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while(hc->hcchar & Chen){
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if(m->ticks - start >= 100){
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print("ep%d.%d channel won't halt hcchar %8.8ux\n",
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ep->dev->nb, ep->nb, hc->hcchar);
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dump(ep->hp);
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break;
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}
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}
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}
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static int
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sofdone(void *a)
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{
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Dwcregs *r;
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r = a;
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return (r->gintmsk & Sofintr) == 0;
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}
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static void
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sofwait(Ctlr *ctlr, int n)
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{
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Dwcregs *r;
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r = ctlr->regs;
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do{
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filock(ctlr);
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r->gintsts = Sofintr;
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ctlr->sofchan |= 1<<n;
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r->gintmsk |= Sofintr;
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fiunlock(ctlr);
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sleep(&ctlr->chanintr[n], sofdone, r);
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}while((r->hfnum & 7) == 6);
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Ctlr *ctlr = a;
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return ctlr->sofchan == 0;
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}
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static int
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chandone(void *a)
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{
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Hostchan *hc;
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int i;
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hc = a;
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if(hc->hcint == (Chhltd|Ack))
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i = hc->hcint;
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if(i == (Chhltd|Ack))
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return 0;
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return (hc->hcint & hc->hcintmsk) != 0;
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return (i & hc->hcintmsk) != 0;
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}
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static int
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chanwait(Ep *ep, Ctlr *ctlr, Hostchan *hc, int mask)
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{
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int intr, n, ointr;
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int intr, ointr, chan;
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ulong start, now;
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Dwcregs *r;
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r = ctlr->regs;
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n = hc - r->hchan;
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chan = hc - ctlr->regs->hchan;
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for(;;){
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restart:
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filock(ctlr);
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r->haintmsk |= 1<<n;
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hc->hcintmsk = mask;
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fiunlock(ctlr);
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tsleep(&ctlr->chanintr[n], chandone, hc, 1000);
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tsleep(&ctlr->chanintr[chan], chandone, hc, 1000);
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if((intr = hc->hcint) == 0)
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goto restart;
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hc->hcintmsk = 0;
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if(intr & Chhltd)
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return intr;
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start = fastticks(0);
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ointr = intr;
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now = start;
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now = start = fastticks(0);
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do{
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intr = hc->hcint;
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if(intr & Chhltd){
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if((ointr != Ack && ointr != (Ack|Xfercomp)) ||
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intr != (Ack|Chhltd|Xfercomp) ||
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(now - start) > 60)
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dprint("await %x after %ldµs %x -> %x\n",
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mask, now - start, ointr, intr);
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dprint("ep%d.%d await %x after %ldµs %x -> %x\n",
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ep->dev->nb, ep->nb, mask, now - start, ointr, intr);
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return intr;
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}
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if((intr & mask) == 0){
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@ -266,21 +264,15 @@ restart:
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}
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now = fastticks(0);
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}while(now - start < 100);
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dprint("ep%d.%d halting channel %8.8ux hcchar %8.8ux "
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"grxstsr %8.8ux gnptxsts %8.8ux hptxsts %8.8ux\n",
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ep->dev->nb, ep->nb, intr, hc->hcchar, r->grxstsr,
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r->gnptxsts, r->hptxsts);
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mask = Chhltd;
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hc->hcchar |= Chdis;
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start = m->ticks;
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while(hc->hcchar & Chen){
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if(m->ticks - start >= 100){
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print("ep%d.%d channel won't halt hcchar %8.8ux\n",
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ep->dev->nb, ep->nb, hc->hcchar);
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break;
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}
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if(debug){
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print("ep%d.%d halting chan %d intr %x\n",
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ep->dev->nb, ep->nb, chan, intr);
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dumphchan(ctlr, hc);
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dumpctlr(ctlr);
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}
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chanhalt(ep, hc);
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logdump(ep);
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hc->hcintmsk = mask = Chhltd;
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}
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}
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@ -371,7 +363,7 @@ static int
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chanio(Ep *ep, Hostchan *hc, int dir, int pid, void *a, int len)
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{
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Ctlr *ctlr;
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int nleft, n, nt, i, maxpkt, npkt;
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int nleft, n, nt, i, imask, maxpkt, npkt, chan, split;
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uint hcdma, hctsiz;
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ctlr = ep->hp->aux;
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@ -388,9 +380,17 @@ chanio(Ep *ep, Hostchan *hc, int dir, int pid, void *a, int len)
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hc->hctsiz = n | npkt<<OPktcnt | pid;
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hc->hcdma = dmaaddr(a);
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split = hc->hcsplt & Spltena;
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if(ep->ttype == Tbulk && dir == Epin || ep->ttype == Tintr && split)
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imask = Chhltd;
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else
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imask = Chhltd|Nak;
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nleft = len;
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logstart(ep);
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for(;;){
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Dwcregs *r;
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hcdma = hc->hcdma;
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hctsiz = hc->hctsiz;
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hc->hctsiz = hctsiz & ~Dopng;
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@ -407,34 +407,46 @@ chanio(Ep *ep, Hostchan *hc, int dir, int pid, void *a, int len)
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ep->dev->nb, ep->nb, i);
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hc->hcint = i;
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}
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if(hc->hcsplt & Spltena){
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r = ctlr->regs;
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chan = hc - r->hchan;
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if(split){
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qlock(&ctlr->split);
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sofwait(ctlr, hc - ctlr->regs->hchan);
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if((dwc.regs->hfnum & 1) == 0)
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if(waserror()){
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qunlock(&ctlr->split);
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nexterror();
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}
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filock(ctlr);
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do {
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ctlr->sofchan = 1<<chan;
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r->gintmsk |= Sofintr;
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fiunlock(ctlr);
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sleep(&ctlr->chanintr[chan], sofdone, ctlr);
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filock(ctlr);
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i = r->hfnum;
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} while((i & 7) == 6);
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if((i & 1) == 0)
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hc->hcchar &= ~Oddfrm;
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else
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hc->hcchar |= Oddfrm;
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} else {
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filock(ctlr);
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}
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hc->hcintmsk = imask;
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hc->hcchar = (hc->hcchar &~ Chdis) | Chen;
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clog(ep, hc);
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wait:
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if(ep->ttype == Tbulk && dir == Epin)
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i = chanwait(ep, ctlr, hc, Chhltd);
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else if(ep->ttype == Tintr && (hc->hcsplt & Spltena))
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i = chanwait(ep, ctlr, hc, Chhltd);
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else
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i = chanwait(ep, ctlr, hc, Chhltd|Nak);
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r->haintmsk |= 1<<chan;
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fiunlock(ctlr);
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i = chanwait(ep, ctlr, hc, imask);
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clog(ep, hc);
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if(hc->hcint != i){
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dprint("chanwait intr %ux->%ux\n", i, hc->hcint);
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if((i = hc->hcint) == 0)
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goto wait;
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}
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hc->hcintmsk = 0;
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hc->hcint = i;
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if(hc->hcsplt & Spltena){
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if(split){
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hc->hcsplt &= ~Compsplt;
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qunlock(&ctlr->split);
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poperror();
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}
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if((i & Xfercomp) == 0 && i != (Chhltd|Ack) && i != Chhltd){
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@ -530,6 +542,7 @@ eptrans(Ep *ep, int rw, void *a, long n)
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hc = chanalloc(ep);
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if(waserror()){
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ep->toggle[rw] = hc->hctsiz & Pid;
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chanhalt(ep, hc);
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chanrelease(ep, hc);
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if(strcmp(up->errstr, Estalled) == 0)
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return 0;
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@ -581,6 +594,7 @@ ctltrans(Ep *ep, uchar *req, long n)
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}
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hc = chanalloc(ep);
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if(waserror()){
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chanhalt(ep, hc);
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chanrelease(ep, hc);
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if(strcmp(up->errstr, Estalled) == 0)
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return 0;
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@ -683,8 +697,34 @@ init(Hci *hp)
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}
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static void
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dump(Hci*)
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dumphchan(Ctlr *ctlr, Hostchan *hc)
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{
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int chan = hc - ctlr->regs->hchan;
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print("hchan[%d] hcchar %ux hcsplt %ux hcint %ux hcintmsk %ux hctsiz %ux hcdma %ux\n",
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chan, hc->hcchar, hc->hcsplt, hc->hcint, hc->hcintmsk, hc->hctsiz, hc->hcdma);
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}
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static void
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dumpctlr(Ctlr *ctlr)
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{
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Dwcregs *r = ctlr->regs;
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print("grxstsr %ux gnptxsts %ux hptxsts %ux\n",
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r->grxstsr, r->gnptxsts, r->hptxsts);
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print("gintsts %ux gintmsk %ux, haint %ux haintmsk %ux\n",
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r->gintsts, r->gintmsk, r->haint, r->haintmsk);
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}
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static void
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dump(Hci *hp)
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{
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Ctlr *ctlr = hp->aux;
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int i;
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dumpctlr(ctlr);
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for(i = 0; i < ctlr->nchan; i++)
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dumphchan(ctlr, &ctlr->regs->hchan[i]);
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}
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static void
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@ -703,6 +743,7 @@ fiqintr(Ureg*, void *a)
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filock(ctlr);
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intr = r->gintsts;
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if(intr & Hcintr){
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r->haintmsk &= ctlr->chanbusy;
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haint = r->haint & r->haintmsk;
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for(i = 0; haint; i++){
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if(haint & 1){
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@ -722,6 +763,7 @@ fiqintr(Ureg*, void *a)
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ctlr->sofchan = 0;
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}
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}
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wakechan &= ctlr->chanbusy;
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if(wakechan){
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ctlr->wakechan |= wakechan;
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armtimerset(1);
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@ -742,6 +784,7 @@ irqintr(Ureg*, void *a)
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wakechan = ctlr->wakechan;
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ctlr->wakechan = 0;
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fiunlock(ctlr);
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wakechan &= ctlr->chanbusy;
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for(i = 0; wakechan; i++){
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if(wakechan & 1)
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wakeup(&ctlr->chanintr[i]);
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@ -831,8 +874,8 @@ epread(Ep *ep, void *a, long n)
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assert(((uintptr)p & (BLOCKALIGN-1)) == 0);
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cachedinvse(p, n);
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nr = eptrans(ep, Read, p, n);
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cachedinvse(p, nr);
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epio->lastpoll = TK2MS(m->ticks);
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cachedinvse(p, nr);
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memmove(a, p, nr);
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qunlock(q);
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freeb(b);
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