usbxhci: better approach to unstalling endpoint and fixup td ring
instead of guessing where the controllers dequeue pointer went, stop the endpoint and then explicitely set te dequeue pointer to the next write td position. that way we do not need to fix the cycle bit in the td's and dont need to rely on if the controller advanced the dequeue pointer after a stall or not. add ctx and slot back pointers to ring.
This commit is contained in:
cinap_lenrek
parent
eee7357c27
commit
40dc39bf7d
1 changed files with 43 additions and 72 deletions
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@ -159,6 +159,10 @@ struct Wait
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struct Ring
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{
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int id;
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Slot *slot;
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u32int *base;
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u32int size;
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@ -168,10 +172,8 @@ struct Ring
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u32int rp;
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u32int wp;
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struct {
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u32int *r;
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u32int v;
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} doorbell;
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u32int *ctx;
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u32int *doorbell;
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Wait *pending;
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Lock;
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@ -264,8 +266,10 @@ freering(Ring *r)
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static void
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initring(Ring *r, int shift)
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{
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r->doorbell.v = 0;
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r->doorbell.r = nil;
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r->id = 0;
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r->ctx = nil;
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r->slot = nil;
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r->doorbell = nil;
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r->pending = nil;
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r->shift = shift;
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r->size = 1<<shift;
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@ -337,8 +341,8 @@ init(Hci *hp)
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ctlr->setrptr(&ctlr->opr[DCBAAP], PADDR(ctlr->dcba));
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initring(ctlr->cr, 8); /* 256 entries */
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ctlr->cr->doorbell.r = &ctlr->dba[0];
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ctlr->cr->doorbell.v = 0;
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ctlr->cr->doorbell = &ctlr->dba[0];
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ctlr->cr->id = 0;
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coherence();
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ctlr->setrptr(&ctlr->opr[CRCR], PADDR(ctlr->cr[0].base) | 1);
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@ -464,7 +468,7 @@ static void
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kickring(Ring *r)
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{
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coherence();
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*r->doorbell.r = r->doorbell.v;
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*r->doorbell = r->id;
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}
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static char*
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@ -742,8 +746,10 @@ initep(Ep *ep)
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}
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if(ep->mode != OREAD){
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initring(io->ring[OWRITE] = &slot->epr[ep->nb*2-1], 8);
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io->ring[OWRITE]->doorbell.r = &ctlr->dba[slot->id];
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io->ring[OWRITE]->doorbell.v = ep->nb*2;
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io->ring[OWRITE]->doorbell = &ctlr->dba[slot->id];
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io->ring[OWRITE]->slot = slot;
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io->ring[OWRITE]->ctx = &slot->obase[(ep->nb*2+0)*8<<ctlr->csz];
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io->ring[OWRITE]->id = ep->nb*2;
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w[1] |= 1 << ep->nb*2;
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if(ep->nb*2 > slot->nep)
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@ -751,8 +757,10 @@ initep(Ep *ep)
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}
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if(ep->mode != OWRITE){
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initring(io->ring[OREAD] = &slot->epr[ep->nb*2], 8);
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io->ring[OREAD]->doorbell.r = &ctlr->dba[slot->id];
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io->ring[OREAD]->doorbell.v = ep->nb*2+1;
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io->ring[OREAD]->doorbell = &ctlr->dba[slot->id];
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io->ring[OREAD]->slot = slot;
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io->ring[OREAD]->ctx = &slot->obase[(ep->nb*2+1)*8<<ctlr->csz];
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io->ring[OREAD]->id = ep->nb*2+1;
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w[1] |= 2 << ep->nb*2;
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if(ep->nb*2+1 > slot->nep)
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@ -849,8 +857,10 @@ epopen(Ep *ep)
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/* allocate control ep 0 ring */
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initring(io->ring[OWRITE] = &slot->epr[0], 8);
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io->ring[OWRITE]->doorbell.r = &ctlr->dba[slot->id];
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io->ring[OWRITE]->doorbell.v = 1;
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io->ring[OWRITE]->doorbell = &ctlr->dba[slot->id];
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io->ring[OWRITE]->slot = slot;
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io->ring[OWRITE]->ctx = &slot->obase[8];
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io->ring[OWRITE]->id = 1;
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slot->nep = 1;
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/* (input) control context */
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@ -905,60 +915,21 @@ epopen(Ep *ep)
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}
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static void
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resetring(Ring *r)
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unstall(Ring *r)
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{
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u64int qp;
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switch(r->ctx[0]&7){
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case 2:
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case 4:
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ilock(r);
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r->rp--; /* assume previous td halted */
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while((int)(r->wp - r->rp) > 0){
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u32int *td = &r->base[4*(--r->wp & r->mask)];
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td[0] = td[1] = td[2] = 0;
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td[3] = (r->wp>>r->shift)&1;
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}
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r->rp = r->wp;
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qp = PADDR(&r->base[4*(r->wp & r->mask)]) | ((~r->wp>>r->shift) & 1);
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iunlock(r);
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}
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static int
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epunstall(Ep *ep, int mode)
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{
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Ctlr *ctlr;
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Slot *slot;
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Epio *io;
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u32int *w;
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int dci, ret;
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ret = 0;
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io = ep->aux;
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slot = ep->dev->aux;
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ctlr = slot->ctlr;
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if(ep->nb == 0)
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dci = 1;
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else
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dci = ep->nb*2;
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/* (output) ep context */
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w = slot->obase;
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w += dci*8<<ctlr->csz;
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if(mode != OREAD && io->ring[OWRITE] != nil){
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switch(w[0]&7){
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case 2:
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case 4:
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resetring(io->ring[OWRITE]);
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ctlrcmd(ctlr, CR_RESETEP | (dci<<16) | (slot->id<<24), 0, 0, nil);
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ret++;
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ctlrcmd(r->slot->ctlr, CR_RESETEP | (r->id<<16) | (r->slot->id<<24), 0, 0, nil);
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ctlrcmd(r->slot->ctlr, CR_SETTRDQP | (r->id<<16) | (r->slot->id<<24), 0, qp, nil);
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}
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}
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w += 8<<ctlr->csz, dci++;
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if(mode != OWRITE && io->ring[OREAD] != nil){
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switch(w[0]&7){
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case 2:
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case 4:
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resetring(io->ring[OREAD]);
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ctlrcmd(ctlr, CR_RESETEP | (dci<<16) | (slot->id<<24), 0, 0, nil);
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ret++;
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}
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}
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return ret;
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}
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static long
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@ -972,6 +943,7 @@ epread(Ep *ep, void *va, long n)
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p = va;
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io = ep->aux;
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if(ep->ttype == Tctl){
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qlock(io);
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if(io->cb == nil || BLEN(io->cb) == 0){
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@ -1001,8 +973,8 @@ epread(Ep *ep, void *va, long n)
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return n;
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}
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epunstall(ep, OREAD);
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ring = io->ring[OREAD];
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unstall(ring);
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ilock(ring);
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queuetd(ring, TR_NORMAL | 1<<16 | 1<<5, n, PADDR(p), ws);
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iunlock(ring);
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@ -1028,6 +1000,7 @@ epwrite(Ep *ep, void *va, long n)
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p = va;
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io = ep->aux;
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if(ep->ttype == Tctl){
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int dir, len;
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@ -1059,8 +1032,8 @@ epwrite(Ep *ep, void *va, long n)
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}
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}
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epunstall(ep, OWRITE);
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ring = io->ring[OWRITE];
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unstall(ring);
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ilock(ring);
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queuetd(ring, TR_SETUPSTAGE | (len > 0 ? 2+dir : 0)<<16 | 1<<6 | 1<<5, 8,
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p[0] | p[1]<<8 | GET2(&p[2])<<16 |
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@ -1104,8 +1077,8 @@ epwrite(Ep *ep, void *va, long n)
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return n;
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}
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epunstall(ep, OWRITE);
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ring = io->ring[OWRITE];
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unstall(ring);
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ilock(ring);
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queuetd(ring, TR_NORMAL | 1<<16 | 1<<5, n, PADDR(p), ws);
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iunlock(ring);
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@ -1238,8 +1211,6 @@ reset(Hci *hp)
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if(getconf("*nousbxhci"))
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return -1;
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fmtinstall(L'H', encodefmt);
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scanpci();
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/*
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