ether2114x: vetting the driver for pc64
the tulip driver is used in microsofts hypver-v as the legacy ethernet adapter for pxe booting. to make the driver work on pc64, we need to store the Block* pointers in a separate array instead of stuffing them into buffer address 2 of the hardware descriptor. also, enable the driver in the pc64 kernel.
This commit is contained in:
cinap_lenrek
parent
5016ac0c63
commit
318fe6a702
2 changed files with 82 additions and 67 deletions
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@ -116,12 +116,13 @@ enum { /* CSR12 - General-Purpose Port */
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Gpc = 0x00000100, /* General Purpose Control */
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};
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typedef struct Des {
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int status;
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int control;
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ulong addr;
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Block* bp;
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} Des;
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enum {
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Dstatus,
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Dcontrol,
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Daddr1,
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Daddr2,
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Dsize,
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};
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enum { /* status */
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Of = 0x00000001, /* Rx: OverFlow */
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@ -227,18 +228,20 @@ typedef struct Ctlr {
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Lock lock;
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Des* rdr; /* receive descriptor ring */
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Block **rbp;
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ulong *rdr; /* receive descriptor ring */
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int nrdr; /* size of rdr */
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int rdrx; /* index into rdr */
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Lock tlock;
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Des* tdr; /* transmit descriptor ring */
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Block *setupbp;
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Block **tbp;
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ulong *tdr; /* transmit descriptor ring */
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int ntdr; /* size of tdr */
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int tdrh; /* host index into tdr */
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int tdri; /* interface index into tdr */
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int ntq; /* descriptors active */
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int ntqmax;
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Block* setupbp;
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ulong of; /* receive statistics */
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ulong ce;
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@ -375,14 +378,13 @@ txstart(Ether* ether)
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{
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Ctlr *ctlr;
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Block *bp;
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Des *des;
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int control;
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ulong *des, control;
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ctlr = ether->ctlr;
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while(ctlr->ntq < (ctlr->ntdr-1)){
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if(ctlr->setupbp){
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if(ctlr->setupbp != nil){
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bp = ctlr->setupbp;
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ctlr->setupbp = 0;
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ctlr->setupbp = nil;
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control = Ic|Set|BLEN(bp);
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}
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else{
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@ -391,15 +393,15 @@ txstart(Ether* ether)
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break;
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control = Ic|Lseg|Fseg|BLEN(bp);
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}
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ctlr->tdr[PREV(ctlr->tdrh, ctlr->ntdr)].control &= ~Ic;
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des = &ctlr->tdr[ctlr->tdrh];
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des->bp = bp;
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des->addr = PCIWADDR(bp->rp);
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des->control |= control;
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ctlr->tbp[ctlr->tdrh] = bp;
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des = &ctlr->tdr[PREV(ctlr->tdrh, ctlr->ntdr)*Dsize];
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des[Dcontrol] &= ~Ic;
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des = &ctlr->tdr[ctlr->tdrh*Dsize];
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des[Daddr1] = PCIWADDR(bp->rp);
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des[Dcontrol] |= control;
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ctlr->ntq++;
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coherence();
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des->status = Own;
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des[Dstatus] = Own;
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csr32w(ctlr, 1, 0);
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ctlr->tdrh = NEXT(ctlr->tdrh, ctlr->ntdr);
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}
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@ -424,9 +426,8 @@ interrupt(Ureg*, void* arg)
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{
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Ctlr *ctlr;
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Ether *ether;
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int len, status;
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Des *des;
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Block *bp;
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Block **bpp, *bp;
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ulong *des, status, len;
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ether = arg;
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ctlr = ether->ctlr;
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@ -459,37 +460,39 @@ interrupt(Ureg*, void* arg)
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* Received packets.
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*/
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if(status & Ri){
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des = &ctlr->rdr[ctlr->rdrx];
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while(!(des->status & Own)){
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if(des->status & Es){
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if(des->status & Of)
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for(;;){
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des = &ctlr->rdr[ctlr->rdrx*Dsize];
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if(des[Dstatus] & Own)
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break;
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if(des[Dstatus] & Es){
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if(des[Dstatus] & Of)
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ctlr->of++;
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if(des->status & Ce)
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if(des[Dstatus] & Ce)
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ctlr->ce++;
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if(des->status & Cs)
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if(des[Dstatus] & Cs)
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ctlr->cs++;
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if(des->status & Tl)
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if(des[Dstatus] & Tl)
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ctlr->tl++;
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if(des->status & Rf)
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if(des[Dstatus] & Rf)
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ctlr->rf++;
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if(des->status & De)
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if(des[Dstatus] & De)
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ctlr->de++;
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}
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else if(bp = iallocb(Rbsz)){
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len = ((des->status & Fl)>>16)-4;
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des->bp->wp = des->bp->rp+len;
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etheriq(ether, des->bp);
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des->bp = bp;
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des->addr = PCIWADDR(bp->rp);
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else if((bp = iallocb(Rbsz)) != nil){
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bpp = &ctlr->rbp[ctlr->rdrx];
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len = ((des[Dstatus] & Fl)>>16)-4;
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(*bpp)->wp += len;
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etheriq(ether, *bpp);
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*bpp = bp;
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des[Daddr1] = PCIWADDR(bp->rp);
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}
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des->control &= Er;
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des->control |= Rbsz;
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des[Dcontrol] &= Er;
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des[Dcontrol] |= Rbsz;
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coherence();
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des->status = Own;
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des[Dstatus] = Own;
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ctlr->rdrx = NEXT(ctlr->rdrx, ctlr->nrdr);
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des = &ctlr->rdr[ctlr->rdrx];
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}
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status &= ~Ri;
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}
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@ -529,28 +532,31 @@ interrupt(Ureg*, void* arg)
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ilock(&ctlr->tlock);
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while(ctlr->ntq){
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des = &ctlr->tdr[ctlr->tdri];
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if(des->status & Own)
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des = &ctlr->tdr[ctlr->tdri*Dsize];
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if(des[Dstatus] & Own)
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break;
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if(des->status & Es){
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if(des->status & Uf)
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if(des[Dstatus] & Es){
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if(des[Dstatus] & Uf)
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ctlr->uf++;
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if(des->status & Ec)
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if(des[Dstatus] & Ec)
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ctlr->ec++;
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if(des->status & Lc)
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if(des[Dstatus] & Lc)
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ctlr->lc++;
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if(des->status & Nc)
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if(des[Dstatus] & Nc)
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ctlr->nc++;
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if(des->status & Lo)
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if(des[Dstatus] & Lo)
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ctlr->lo++;
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if(des->status & To)
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if(des[Dstatus] & To)
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ctlr->to++;
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ether->oerrs++;
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}
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des[Dcontrol] &= Er;
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coherence();
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freeb(des->bp);
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des->control &= Er;
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bpp = &ctlr->tbp[ctlr->tdri];
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freeb(*bpp);
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*bpp = nil;
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ctlr->ntq--;
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ctlr->tdri = NEXT(ctlr->tdri, ctlr->ntdr);
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@ -562,7 +568,7 @@ interrupt(Ureg*, void* arg)
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* Anything left not catered for?
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*/
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if(status)
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panic("#l%d: status %8.8uX", ether->ctlrno, status);
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panic("#l%d: status %8.8luX", ether->ctlrno, status);
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}
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}
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@ -570,7 +576,7 @@ static void
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ctlrinit(Ether* ether)
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{
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Ctlr *ctlr;
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Des *des;
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ulong *des;
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Block *bp;
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int i;
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uchar bi[Eaddrlen*2];
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@ -584,23 +590,31 @@ ctlrinit(Ether* ether)
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* create and post a setup packet to initialise
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* the physical ethernet address.
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*/
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ctlr->rdr = xspanalloc(ctlr->nrdr*sizeof(Des), 8*sizeof(ulong), 0);
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for(des = ctlr->rdr; des < &ctlr->rdr[ctlr->nrdr]; des++){
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des->bp = iallocb(Rbsz);
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if(des->bp == nil)
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ctlr->rbp = xspanalloc(ctlr->nrdr*sizeof(Block*), 0, 0);
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ctlr->rdr = xspanalloc(ctlr->nrdr*sizeof(ulong)*Dsize, 8*sizeof(ulong), 0);
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for(i = 0; i < ctlr->nrdr; i++){
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bp = iallocb(Rbsz);
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if(bp == nil)
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panic("can't allocate ethernet receive ring");
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des->status = Own;
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des->control = Rbsz;
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des->addr = PCIWADDR(des->bp->rp);
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ctlr->rbp[i] = bp;
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des = &ctlr->rdr[i*Dsize];
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des[Dstatus] = Own;
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des[Dcontrol] = Rbsz;
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des[Daddr1] = PCIWADDR(bp->rp);
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}
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ctlr->rdr[ctlr->nrdr-1].control |= Er;
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ctlr->rdr[(ctlr->nrdr-1)*Dsize + Dcontrol] |= Er;
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ctlr->rdrx = 0;
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coherence();
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csr32w(ctlr, 3, PCIWADDR(ctlr->rdr));
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ctlr->tdr = xspanalloc(ctlr->ntdr*sizeof(Des), 8*sizeof(ulong), 0);
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ctlr->tdr[ctlr->ntdr-1].control |= Er;
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ctlr->tbp = xspanalloc(ctlr->ntdr*sizeof(Block*), 0, 0);
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ctlr->tdr = xspanalloc(ctlr->ntdr*sizeof(ulong)*Dsize, 8*sizeof(ulong), 0);
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for(i = 0; i < ctlr->ntdr; i++)
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ctlr->tbp[i] = nil;
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ctlr->tdr[(ctlr->ntdr-1)*Dsize + Dcontrol] |= Er;
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ctlr->tdrh = 0;
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ctlr->tdri = 0;
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coherence();
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csr32w(ctlr, 4, PCIWADDR(ctlr->tdr));
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/*
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@ -619,6 +633,7 @@ ctlrinit(Ether* ether)
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bi[i*4+2] = ether->ea[i*2+1];
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bi[i*4+3] = ether->ea[i*2];
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}
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bp = iallocb(Eaddrlen*2*16);
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if(bp == nil)
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panic("can't allocate ethernet setup buffer");
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@ -48,7 +48,7 @@ link
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# devi82365
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cputemp pci
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# ether2000 ether8390
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# ether2114x pci
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ether2114x pci
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# ether589 etherelnk3
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ether79c970 pci
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# ether8003 ether8390
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