From 2830cd7eb6182eb7bc42e10557a160156649859c Mon Sep 17 00:00:00 2001
From: cinap_lenrek <cinap_lenrek@felloff.net>
Date: Sat, 17 Dec 2016 19:47:35 +0100
Subject: [PATCH] pc: modify cpu0 page tables in patwc() instead of current cpu
 ones

on 386 kernel, each processor has its own pdb where the primary
pdb for kernel mappings is on cpu0 and other cpu's lazily pull
pdb entries from cpu0 when they fault in vmapsync().

so we have to edit the table tables in the pdb of cpu0 and not
the current processor.
---
 sys/src/9/pc/mmu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sys/src/9/pc/mmu.c b/sys/src/9/pc/mmu.c
index 3c79f90a3..c0f7b7718 100644
--- a/sys/src/9/pc/mmu.c
+++ b/sys/src/9/pc/mmu.c
@@ -1097,12 +1097,12 @@ patwc(void *a, int n)
 
 	/* set the bits for all pages in range */
 	for(va = (ulong)a; n > 0; n -= z, va += z){
-		pte = mmuwalk(m->pdb, va, 1, 0);
+		pte = mmuwalk(MACHP(0)->pdb, va, 1, 0);
 		if(pte && (*pte & (PTEVALID|PTESIZE)) == (PTEVALID|PTESIZE)){
 			z = 4*MB - (va & (4*MB-1));
 			mask = 3<<3 | 1<<12;
 		} else {
-			pte = mmuwalk(m->pdb, va, 2, 0);
+			pte = mmuwalk(MACHP(0)->pdb, va, 2, 0);
 			if(pte == 0 || (*pte & PTEVALID) == 0)
 				panic("patwc: va=%#p", va);
 			z = BY2PG - (va & (BY2PG-1));