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vmx: mask out bits 0:2 and 24:30 of pci CONFIG_ADDRESS on read

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These bits are reserved, and by the specification,
must return zero on read.

This is also used by plan 9 for detecting config mode #1.
This commit is contained in:
cinap_lenrek 2020-11-02 01:01:48 +01:00
parent d75d842cf5
commit 2063019560
1 changed files with 1 additions and 1 deletions
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2
sys/src/cmd/vmx/pci.c
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@ -237,7 +237,7 @@ pciio(int isin, u16int port, u32int val, int sz, void *)
switch(isin << 16 | port){
case 0x0cf8: cfgaddr = val; return 0;
case 0x10cf8: return cfgaddr;
case 0x10cf8: return cfgaddr & ~0x7f000003;
case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff:
val <<= 8 * (port & 3);
mask = -1UL >> 32 - 8 * sz << 8 * (port & 3);