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This commit is contained in:
cinap_lenrek 2020-06-06 16:52:01 +02:00
commit 1a5dafcc3d
79 changed files with 588 additions and 442 deletions
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2
sys/src/9/bcm64/dat.h
View file

@ -200,7 +200,7 @@ extern int normalprint;
struct ISAConf {
char *type;
ulong port;
uvlong port;
int irq;
ulong dma;
ulong mem;

2
sys/src/9/bcm64/fns.h
View file

@ -68,7 +68,7 @@ extern void kmapinval(void);
extern KMap *kmap(Page*);
extern void kunmap(KMap*);
extern uintptr mmukmap(uintptr, uintptr, usize);
extern void* vmap(uintptr, int);
extern void* vmap(uvlong, int);
extern void vunmap(void*, int);
extern void mmu0init(uintptr*);

4
sys/src/9/bcm64/io.h
View file

@ -211,7 +211,7 @@ struct Pcidev
uchar ltr;
struct {
uintptr bar; /* base address */
uvlong bar; /* base address */
int size;
} mem[6];
@ -226,7 +226,7 @@ struct Pcidev
int pmrb; /* power management register block */
struct {
uintptr bar;
uvlong bar;
int size;
} ioa, mema;
};

4
sys/src/9/bcm64/mmu.c
View file

@ -319,10 +319,10 @@ mmukmap(uintptr va, uintptr pa, usize size)
}
void*
vmap(uintptr pa, int size)
vmap(uvlong pa, int size)
{
static uintptr base = VMAP;
uintptr pe = pa + size;
uvlong pe = pa + size;
uintptr va;
va = base;

56
sys/src/9/bcm64/pci.c
View file

@ -61,8 +61,9 @@ typedef struct Pcisiz Pcisiz;
struct Pcisiz
{
Pcidev* dev;
int siz;
int bar;
int siz;
int typ;
};
enum
@ -294,11 +295,12 @@ pcimask(ulong v)
}
static void
pcibusmap(Pcidev *root, uintptr *pmema, uintptr *pioa, int wrreg)
pcibusmap(Pcidev *root, uvlong *pmema, ulong *pioa, int wrreg)
{
Pcidev *p;
int ntb, i, size, rno, hole;
uintptr v, mema, ioa, sioa, smema, base, limit;
uvlong v, mema, smema, base, limit;
ulong ioa, sioa;
Pcisiz *table, *tptr, *mtb, *itb;
ioa = *pioa;
@ -341,16 +343,18 @@ pcibusmap(Pcidev *root, uintptr *pmema, uintptr *pioa, int wrreg)
itb->dev = p;
itb->bar = -1;
itb->siz = p->ioa.size;
itb->typ = 0;
itb++;
mtb->dev = p;
mtb->bar = -1;
mtb->siz = p->mema.size;
mtb->typ = 0;
mtb++;
continue;
}
for(i = 0; i <= 5; i++) {
for(i = 0; i < nelem(p->mem); i++) {
rno = PciBAR0 + i*4;
v = pcicfgrw32(p->tbdf, rno, 0, 1);
size = pcibarsize(p, rno);
@ -362,16 +366,17 @@ pcibusmap(Pcidev *root, uintptr *pmema, uintptr *pioa, int wrreg)
itb->dev = p;
itb->bar = i;
itb->siz = size;
itb->typ = 1;
itb++;
}
else {
mtb->dev = p;
mtb->bar = i;
mtb->siz = size;
mtb++;
if((v & 7) == 4)
mtb->typ = v & 7;
if(mtb->typ & 4)
i++;
mtb++;
}
}
}
@ -412,21 +417,21 @@ pcibusmap(Pcidev *root, uintptr *pmema, uintptr *pioa, int wrreg)
hole = tptr->siz;
if(tptr->bar == -1)
hole = 1<<20;
mema = (mema+hole-1) & ~(hole-1);
mema = (mema+hole-1) & ~((uvlong)hole-1);
p = tptr->dev;
if(tptr->bar == -1)
p->mema.bar = mema;
else {
p->pcr |= MEMen;
p->mem[tptr->bar].bar = mema;
p->mem[tptr->bar].bar = mema|tptr->typ;
if(wrreg){
rno = PciBAR0+(tptr->bar*4);
if((mema >> 32) != 0){
pcicfgrw32(p->tbdf, rno, mema|4, 0);
pcicfgrw32(p->tbdf, rno+4, mema >> 32, 0);
} else {
pcicfgrw32(p->tbdf, rno, mema, 0);
pcicfgrw32(p->tbdf, rno, mema|tptr->typ, 0);
if(tptr->bar < nelem(p->mem)-1 && (tptr->typ & 4) != 0){
p->mem[tptr->bar+1].bar = 0;
p->mem[tptr->bar+1].size = 0;
pcicfgrw32(p->tbdf, rno+4, mema>>32, 0);
}
}
}
@ -576,13 +581,14 @@ pcilscan(int bno, Pcidev** list, Pcidev *parent)
if((hdt & 0x7F) != 0)
break;
rno = PciBAR0;
for(i = 0; i <= 5; i++) {
p->mem[i].bar = pcicfgr32(p, rno);
for(i = 0; i < nelem(p->mem); i++) {
p->mem[i].bar = (ulong)pcicfgr32(p, rno);
p->mem[i].size = pcibarsize(p, rno);
if((p->mem[i].bar & 7) == 4 && i < 5){
if((p->mem[i].bar & 7) == 4 && i < nelem(p->mem)-1){
rno += 4;
p->mem[i].bar |= (uintptr)pcicfgr32(p, rno) << 32;
i++;
p->mem[i++].bar |= (uvlong)pcicfgr32(p, rno) << 32;
p->mem[i].bar = 0;
p->mem[i].size = 0;
}
rno += 4;
}
@ -654,7 +660,8 @@ pcilscan(int bno, Pcidev** list, Pcidev *parent)
static void
pcicfginit(void)
{
uintptr mema, ioa;
uvlong mema;
ulong ioa;
fmtinstall('T', tbdffmt);
@ -928,8 +935,13 @@ pcienable(Pcidev *p)
delay(100); /* D3: minimum delay 50ms */
/* restore registers */
for(i = 0; i < 6; i++)
for(i = 0; i < nelem(p->mem); i++){
pcicfgw32(p, PciBAR0+i*4, p->mem[i].bar);
if((p->mem[i].bar&7) == 4 && i < nelem(p->mem)-1){
pcicfgw32(p, PciBAR0+i*4+4, p->mem[i].bar>>32);
i++;
}
}
pcicfgw8(p, PciINTL, p->intl);
pcicfgw8(p, PciLTR, p->ltr);
pcicfgw8(p, PciCLS, p->cls);
@ -941,7 +953,7 @@ pcienable(Pcidev *p)
pcr = IOen|MEMen|MASen;
else {
pcr = 0;
for(i = 0; i < 6; i++){
for(i = 0; i < nelem(p->mem); i++){
if(p->mem[i].size == 0)
continue;
if(p->mem[i].bar & 1)

18
sys/src/9/pc/archacpi.c
View file

@ -46,7 +46,7 @@ static Rsd *rsd;
/* physical addresses visited by maptable() */
static int ntblpa;
static uintptr tblpa[64];
static uvlong tblpa[64];
/* successfully mapped tables */
static int ntblmap;
@ -104,18 +104,16 @@ memcheck(uintptr pa, long len)
}
static void
maptable(uvlong xpa)
maptable(uvlong pa)
{
uchar *p, *e;
uintptr pa;
u32int l;
Tbl *t;
int i;
pa = xpa;
if((uvlong)pa != xpa || pa == 0 || pa+7 < pa)
if(-pa < 8)
return;
if(ntblpa >= nelem(tblpa) || ntblmap >= nelem(tblmap))
return;
@ -131,7 +129,7 @@ maptable(uvlong xpa)
l = get32(t->len);
if(l < Tblsz
|| l >= 0x10000000
|| pa+l-1 < pa){
|| -pa < l){
vunmap(t, 8);
return;
}
@ -519,7 +517,7 @@ enumec(void *dot, void *)
static long
readmem(Chan*, void *v, long n, vlong o)
{
uintptr pa = (uintptr)o;
uvlong pa = (uvlong)o;
void *t;
if((n = memcheck(pa, n)) <= 0)
@ -539,7 +537,7 @@ readmem(Chan*, void *v, long n, vlong o)
static long
writemem(Chan*, void *v, long n, vlong o)
{
uintptr pa = (uintptr)o;
uvlong pa = (uvlong)o;
void *t;
if(memcheck(pa, n) != n)
@ -778,7 +776,7 @@ readtbls(Chan*, void *v, long n, vlong o)
static int
identify(void)
{
uintptr pa;
uvlong pa;
char *cp;
if((cp = getconf("*acpi")) == nil)

83
sys/src/9/pc/audioac97.c
View file

@ -288,6 +288,9 @@ ac97interrupt(Ureg *, void *arg)
adev = arg;
ctlr = adev->ctlr;
if(ctlr == nil || ctlr->adev != adev)
return;
stat = csr32r(ctlr, Sta);
stat &= S2ri | Sri | Pri | Mint | Point | Piint | Moint | Miint | Gsci;
if(stat & (Point|Piint|Mint)){
@ -480,59 +483,34 @@ sethwp(Ctlr *ctlr, long off, void *ptr)
}
static int
ac97reset(Audio *adev)
ac97reset1(Audio *adev, Ctlr *ctlr)
{
static Ctlr *cards = nil;
Pcidev *p;
int i, irq, tbdf;
Ctlr *ctlr;
ulong ctl, stat = 0;
Pcidev *p;
/* make a list of all ac97 cards if not already done */
if(cards == nil){
p = nil;
while(p = ac97match(p)){
ctlr = xspanalloc(sizeof(Ctlr), 8, 0);
memset(ctlr, 0, sizeof(Ctlr));
ctlr->pcidev = p;
ctlr->next = cards;
cards = ctlr;
}
}
/* pick a card from the list */
for(ctlr = cards; ctlr; ctlr = ctlr->next){
if(p = ctlr->pcidev){
ctlr->pcidev = nil;
goto Found;
}
}
return -1;
Found:
adev->ctlr = ctlr;
ctlr->adev = adev;
p = ctlr->pcidev;
/* ICH4 through ICH7 may use memory-type base address registers */
if(p->vid == 0x8086 &&
(p->did == 0x24c5 || p->did == 0x24d5 || p->did == 0x266e || p->did == 0x27de) &&
(p->mem[2].bar != 0 && p->mem[3].bar != 0) &&
((p->mem[2].bar & 1) == 0 && (p->mem[3].bar & 1) == 0)){
ctlr->mmmix = vmap(p->mem[2].bar & ~0xf, p->mem[2].size);
ctlr->mmmix = vmap(p->mem[2].bar & ~0xF, p->mem[2].size);
if(ctlr->mmmix == nil){
print("ac97: vmap failed for mmmix 0x%08lux\n", p->mem[2].bar);
print("ac97: vmap failed for mmmix %llux\n", p->mem[2].bar & ~0xF);
return -1;
}
ctlr->mmreg = vmap(p->mem[3].bar & ~0xf, p->mem[3].size);
ctlr->mmreg = vmap(p->mem[3].bar & ~0xF, p->mem[3].size);
if(ctlr->mmreg == nil){
print("ac97: vmap failed for mmreg 0x%08lux\n", p->mem[3].bar);
print("ac97: vmap failed for mmreg %llux\n", p->mem[3].bar & ~0xF);
vunmap(ctlr->mmmix, p->mem[2].size);
return -1;
}
ctlr->ismmio = 1;
}else{
if((p->mem[0].bar & 1) == 0 || (p->mem[1].bar & 1) == 0){
print("ac97: not i/o regions 0x%04lux 0x%04lux\n", p->mem[0].bar, p->mem[1].bar);
print("ac97: not i/o regions 0x%04llux 0x%04llux\n", p->mem[0].bar, p->mem[1].bar);
return -1;
}
@ -556,6 +534,8 @@ Found:
irq = p->intl;
tbdf = p->tbdf;
adev->ctlr = ctlr;
print("#A%d: ac97 port 0x%04lux mixport 0x%04lux irq %d\n",
adev->ctlrno, ctlr->port, ctlr->mixport, irq);
@ -651,6 +631,43 @@ Found:
return 0;
}
static int
ac97reset(Audio *adev)
{
static Ctlr *cards = nil;
Ctlr *ctlr;
Pcidev *p;
/* make a list of all ac97 cards if not already done */
if(cards == nil){
p = nil;
while((p = ac97match(p)) != nil){
ctlr = mallocz(sizeof(Ctlr), 1);
if(ctlr == nil){
print("ac97: can't allocate memory\n");
break;
}
ctlr->pcidev = p;
ctlr->next = cards;
cards = ctlr;
}
}
/* pick a card from the list */
for(ctlr = cards; ctlr; ctlr = ctlr->next){
if(ctlr->adev == nil && ctlr->pcidev != nil){
ctlr->adev = adev;
pcienable(ctlr->pcidev);
if(ac97reset1(adev, ctlr) == 0)
return 0;
pcidisable(ctlr->pcidev);
ctlr->pcidev = nil;
ctlr->adev = nil;
}
}
return -1;
}
void
audioac97link(void)
{

103
sys/src/9/pc/audiohda.c
View file

@ -299,12 +299,14 @@ struct Bld {
struct Ctlr {
Ctlr *next;
uint no;
int no;
Lock; /* interrupt lock */
QLock; /* command lock */
Audio *adev;
uvlong port;
Pcidev *pcidev;
uchar *mem;
@ -1539,6 +1541,8 @@ hdainterrupt(Ureg *, void *arg)
adev = arg;
ctlr = adev->ctlr;
if(ctlr == nil || ctlr->adev != adev)
return;
ilock(ctlr);
sts = csr32(ctlr, Intsts);
if(sts & ctlr->sout.sdintr){
@ -1823,42 +1827,12 @@ hdacmdwrite(Chan *, void *a, long n, vlong)
}
static int
hdareset(Audio *adev)
hdareset1(Audio *adev, Ctlr *ctlr)
{
static Ctlr *cards = nil;
int irq, tbdf, best, cad;
Ctlr *ctlr;
int best, cad, irq, tbdf;
Pcidev *p;
/* make a list of all cards if not already done */
if(cards == nil){
p = nil;
while(p = hdamatch(p)){
ctlr = mallocz(sizeof(Ctlr), 1);
if(ctlr == nil){
print("hda: can't allocate memory\n");
return -1;
}
ctlr->pcidev = p;
ctlr->next = cards;
cards = ctlr;
}
}
/* pick a card from the list */
for(ctlr = cards; ctlr != nil; ctlr = ctlr->next){
if(p = ctlr->pcidev){
ctlr->pcidev = nil;
goto Found;
}
}
return -1;
Found:
pcienable(p);
adev->ctlr = ctlr;
ctlr->adev = adev;
p = ctlr->pcidev;
irq = p->intl;
tbdf = p->tbdf;
@ -1894,15 +1868,19 @@ Found:
pcicfgw8(p, 0x44, pcicfgr8(p, 0x44) & 0xf8);
}
ctlr->no = adev->ctlrno;
ctlr->size = p->mem[0].size;
ctlr->q = qopen(256, 0, 0, 0);
ctlr->mem = vmap(p->mem[0].bar & ~0x0F, ctlr->size);
if(ctlr->mem == nil){
print("#A%d: can't map %.8lux\n", ctlr->no, p->mem[0].bar);
if(p->mem[0].bar & 1){
print("hda: bar0 %llux: not memory\n", p->mem[0].bar);
return -1;
}
print("#A%d: hda mem %p irq %d\n", ctlr->no, ctlr->mem, irq);
ctlr->size = p->mem[0].size;
ctlr->port = p->mem[0].bar & ~0xF;
ctlr->mem = vmap(ctlr->port, ctlr->size);
if(ctlr->mem == nil){
print("hda: can't map %llux\n", ctlr->port);
return -1;
}
ctlr->no = adev->ctlrno;
print("#A%d: hda mem %llux irq %d\n", ctlr->no, ctlr->port, irq);
if(hdastart(ctlr) < 0){
print("#A%d: unable to start hda\n", ctlr->no);
@ -1945,6 +1923,7 @@ Found:
else if(connectpin(ctlr, &ctlr->sin, Wain, best, cad, nil) < 0)
print("#A%d: error connecting input pin\n", ctlr->no);
adev->ctlr = ctlr;
adev->read = hdaread;
adev->write = hdawrite;
adev->close = hdaclose;
@ -1955,12 +1934,52 @@ Found:
adev->ctl = hdactl;
intrenable(irq, hdainterrupt, adev, tbdf, "hda");
ctlr->q = qopen(256, 0, 0, 0);
lastcard = ctlr;
addarchfile("hdacmd", 0664, hdacmdread, hdacmdwrite);
return 0;
}
static int
hdareset(Audio *adev)
{
static Ctlr *cards = nil;
Ctlr *ctlr;
Pcidev *p;
/* make a list of all cards if not already done */
if(cards == nil){
p = nil;
while((p = hdamatch(p)) != nil){
ctlr = mallocz(sizeof(Ctlr), 1);
if(ctlr == nil){
print("hda: can't allocate memory\n");
break;
}
ctlr->pcidev = p;
ctlr->next = cards;
cards = ctlr;
}
}
/* pick a card from the list */
for(ctlr = cards; ctlr != nil; ctlr = ctlr->next){
if(ctlr->adev == nil && ctlr->pcidev != nil){
ctlr->adev = adev;
pcienable(ctlr->pcidev);
if(hdareset1(adev, ctlr) == 0)
return 0;
pcidisable(ctlr->pcidev);
ctlr->pcidev = nil;
ctlr->adev = nil;
}
}
return -1;
}
void
audiohdalink(void)
{

101
sys/src/9/pc/audiosb16.c
View file

@ -474,6 +474,8 @@ audiointr(Ureg *, void *arg)
adev = arg;
ctlr = adev->ctlr;
if(ctlr == nil || ctlr->adev != adev)
return;
if(!ctlr->active){
iprint("#A%d: unexpected %s interrupt\n",
ctlr->adev->ctlrno, ctlr->adev->name);
@ -672,46 +674,14 @@ ess1688(ISAConf* sbconf, Blaster *blaster, int ctlrno)
return 0;
}
static int
audioprobe(Audio *adev)
{
static int irq[] = {9,5,7,10};
static Ctlr *cards = nil;
static int irqmap[] = {9,5,7,10};
Ctlr *ctlr;
static int
reset1(Audio *adev, Ctlr *ctlr)
{
Blaster *blaster;
int i, x;
/* make a list of audio isa cards if not already done */
if(cards == nil){
for(i=0; i<nelem(irq); i++){
ctlr = mallocz(sizeof(Ctlr), 1);
if(ctlr == nil){
print("sb16: can't allocate memory\n");
break;
}
ctlr->conf.port = 0x220 + i*0x10;
ctlr->conf.irq = irq[i];
ctlr->conf.dma = 0;
if(isaconfig("audio", i, &ctlr->conf) == 0){
free(ctlr);
break;
}
ctlr->next = cards;
cards = ctlr;
}
}
/* pick a card */
for(ctlr = cards; ctlr; ctlr = ctlr->next){
if(ctlr->conf.type && strcmp(adev->name, ctlr->conf.type) == 0){
ctlr->conf.type = nil;
goto Found;
}
}
return -1;
Found:
switch(ctlr->conf.port){
case 0x220:
case 0x240:
@ -719,25 +689,22 @@ Found:
case 0x280:
break;
default:
print("#A%d: bad port %#lux\n", adev->ctlrno, ctlr->conf.port);
print("#A%d: bad port %lux\n", adev->ctlrno, (ulong)ctlr->conf.port);
return -1;
}
if(ioalloc(ctlr->conf.port, 0x10, 0, "audio") < 0){
print("#A%d: cannot ioalloc range %lux+0x10\n",
adev->ctlrno, ctlr->conf.port);
adev->ctlrno, (ulong)ctlr->conf.port);
return -1;
}
if(ioalloc(ctlr->conf.port+0x100, 1, 0, "audio.mpu401") < 0){
iofree(ctlr->conf.port);
print("#A%d: cannot ioalloc range %lux+0x01\n",
adev->ctlrno, ctlr->conf.port+0x100);
adev->ctlrno, (ulong)ctlr->conf.port+0x100);
return -1;
}
ctlr->adev = adev;
adev->ctlr = ctlr;
blaster = &ctlr->blaster;
blaster->reset = ctlr->conf.port + 0x6;
blaster->read = ctlr->conf.port + 0xa;
@ -795,16 +762,16 @@ Errout:
}
/* set irq */
for(i=0; i<nelem(irq); i++){
if(ctlr->conf.irq == irq[i]){
for(i=0; i<nelem(irqmap); i++){
if(ctlr->conf.irq == irqmap[i]){
mxcmd(blaster, 0x80, 1<<i);
break;
}
}
x = mxread(blaster, 0x80);
for(i=0; i<nelem(irq); i++){
for(i=0; i<nelem(irqmap); i++){
if(x & (1<<i)){
ctlr->conf.irq = irq[i];
ctlr->conf.irq = irqmap[i];
break;
}
}
@ -828,7 +795,7 @@ Errout:
}
print("#A%d: %s port 0x%04lux irq %d dma %lud\n", adev->ctlrno, adev->name,
ctlr->conf.port, ctlr->conf.irq, ctlr->conf.dma);
(ulong)ctlr->conf.port, ctlr->conf.irq, ctlr->conf.dma);
ctlr->ring.nbuf = Blocks*Blocksize;
if(dmainit(ctlr->conf.dma, ctlr->ring.nbuf))
@ -839,6 +806,7 @@ Errout:
setempty(ctlr);
adev->ctlr = ctlr;
adev->write = audiowrite;
adev->close = audioclose;
adev->volread = audiovolread;
@ -851,6 +819,45 @@ Errout:
return 0;
}
static int
audioprobe(Audio *adev)
{
static Ctlr *cards = nil;
Ctlr *ctlr;
int i;
/* make a list of audio isa cards if not already done */
if(cards == nil){
for(i=0; i<nelem(irqmap); i++){
ctlr = mallocz(sizeof(Ctlr), 1);
if(ctlr == nil){
print("sb16: can't allocate memory\n");
break;
}
ctlr->conf.port = 0x220 + i*0x10;
ctlr->conf.irq = irqmap[i];
ctlr->conf.dma = 0;
if(!isaconfig("audio", i, &ctlr->conf)){
free(ctlr);
break;
}
ctlr->next = cards;
cards = ctlr;
}
}
/* pick a card */
for(ctlr = cards; ctlr; ctlr = ctlr->next){
if(ctlr->adev == nil && strcmp(adev->name, ctlr->conf.type) == 0){
ctlr->adev = adev;
if(reset1(adev, ctlr) == 0)
return 0;
ctlr->adev = (void*)-1;
}
}
return -1;
}
void
audiosb16link(void)
{

2
sys/src/9/pc/dat.h
View file

@ -343,7 +343,7 @@ enum {
struct ISAConf {
char *type;
ulong port;
uvlong port;
int irq;
ulong dma;
ulong mem;

2
sys/src/9/pc/devarch.c
View file

@ -1247,7 +1247,7 @@ isaconfig(char *class, int ctlrno, ISAConf *isa)
if(cistrncmp(p, "type=", 5) == 0)
isa->type = p + 5;
else if(cistrncmp(p, "port=", 5) == 0)
isa->port = strtoul(p+5, &p, 0);
isa->port = strtoull(p+5, &p, 0);
else if(cistrncmp(p, "irq=", 4) == 0)
isa->irq = strtoul(p+4, &p, 0);
else if(cistrncmp(p, "dma=", 4) == 0)

10
sys/src/9/pc/devlml.c
View file

@ -44,7 +44,7 @@ typedef struct LML LML;
struct LML {
/* Hardware */
Pcidev *pcidev;
ulong pciBaseAddr;
uintptr pciBaseAddr;
/* Allocated memory */
CodeData *codedata;
@ -132,7 +132,7 @@ prepbuf(LML *lml)
static void
lmlreset(void)
{
ulong regpa;
uvlong regpa;
char name[32];
void *regva;
LML *lml;
@ -170,8 +170,8 @@ lmlreset(void)
print("lml: failed to map registers\n");
return;
}
lml->pciBaseAddr = (ulong)regva;
print(", mapped at 0x%.8lux\n", lml->pciBaseAddr);
lml->pciBaseAddr = (uintptr)regva;
print(", mapped at %#p\n", lml->pciBaseAddr);
memset(&segbuf, 0, sizeof(segbuf));
segbuf.attr = SG_PHYSICAL;
@ -188,7 +188,7 @@ lmlreset(void)
segbuf.attr = SG_PHYSICAL | SG_DEVICE | SG_NOEXEC;
sprint(name, "lml%d.regs", nlml);
kstrdup(&segbuf.name, name);
segbuf.pa = (ulong)regpa;
segbuf.pa = (uintptr)regpa;
segbuf.size = pcidev->mem[0].size;
if(addphysseg(&segbuf) == nil){
print("lml: physsegment: %s\n", name);

29
sys/src/9/pc/devpccard.c
View file

@ -540,7 +540,7 @@ devpccardlink(void)
pci = nil;
intl = 0xff;
while ((pci = pcimatch(pci, 0, 0)) != nil) {
ulong baddr;
uvlong baddr;
Cardbus *cb;
uchar pin;
@ -632,12 +632,13 @@ devpccardlink(void)
pcicfgw8(cb->pci, 0xD4, 0xCA);
}
if ((baddr = pcicfgr32(cb->pci, PciBAR0)) == 0) {
baddr = pcicfgr32(cb->pci, PciBAR0);
if (baddr == 0) {
int size = (pci->did == Ricoh_478_did)? 0x10000: 0x1000;
baddr = upaalloc(-1, size, size);
baddr = upaalloc(-1ULL, size, size);
if(baddr == -1)
continue;
pcicfgw32(cb->pci, PciBAR0, baddr);
pcicfgw32(cb->pci, PciBAR0, (ulong)baddr);
cb->regs = (ulong *)vmap(baddr, size);
}
else
@ -652,7 +653,7 @@ devpccardlink(void)
/* Don't really know what to do with this... */
i82365probe(cb, LegacyAddr, LegacyAddr + 1);
print("#Y%ld: %s, %.8ulX intl %d\n", cb - cbslots,
print("#Y%ld: %s, %.8lluX intl %d\n", cb - cbslots,
variant[i].name, baddr, pci->intl);
nslots++;
@ -776,9 +777,9 @@ static void
configure(Cardbus *cb)
{
int i, r;
ulong size, bar;
Pcidev *pci;
ulong membase, iobase, memlen, iolen, rombase, romlen;
uvlong romlen, memlen, membase, rombase, bar;
ulong iobase, iolen, size;
if(DEBUG)
print("configuring slot %ld (%s)\n", cb - cbslots, states[cb->state]);
@ -822,7 +823,7 @@ configure(Cardbus *cb)
memlen += romlen;
if(memlen < 1*1024*1024)
memlen = 1*1024*1024;
membase = upaalloc(-1, memlen, 4*1024*1024); /* TO DO: better alignment */
membase = upaalloc(-1ULL, memlen, 4*1024*1024); /* TO DO: better alignment */
if(membase == -1)
return;
@ -831,8 +832,8 @@ configure(Cardbus *cb)
pcicfgw32(cb->pci, PciCBIBR1, 0);
pcicfgw32(cb->pci, PciCBILR1, 0);
pcicfgw32(cb->pci, PciCBMBR0, membase);
pcicfgw32(cb->pci, PciCBMLR0, membase + memlen-1);
pcicfgw32(cb->pci, PciCBMBR0, (ulong)membase);
pcicfgw32(cb->pci, PciCBMLR0, (ulong)membase + memlen-1);
pcicfgw32(cb->pci, PciCBMBR1, 0);
pcicfgw32(cb->pci, PciCBMLR1, 0);
@ -861,7 +862,7 @@ configure(Cardbus *cb)
pci->mem[i].bar = bar;
pcicfgw32(pci, PciBAR0 + 4*i, bar);
if((bar & 1) == 0){
print("%T mem[%d] %8.8lux %d\n", pci->tbdf, i, bar, pci->mem[i].size);
print("%T mem[%d] %8.8llux %d\n", pci->tbdf, i, bar, pci->mem[i].size);
if(bar & 0x80){ /* TO DO: enable prefetch */
;
}
@ -1172,7 +1173,7 @@ pccard_pcmspecial(char *idstr, ISAConf *isa)
pi->irq = isa->irq;
unlock(cb);
print("#Y%ld: %s irq %d, port %lX\n", cb - cbslots, pi->verstr, isa->irq, isa->port);
print("#Y%ld: %s irq %d, port %lluX\n", cb - cbslots, pi->verstr, isa->irq, isa->port);
return (int)(cb - cbslots);
}
@ -1325,11 +1326,11 @@ pccardread(Chan *c, void *a, long n, vlong offset)
for (i = 0; i != Nbars; i++)
if (pci->mem[i].size)
p = seprint(p, e,
"\tmem[%d] %.8ulX (%.8uX)\n",
"\tmem[%d] %.8ullX (%.8uX)\n",
i, pci->mem[i].bar,
pci->mem[i].size);
if (pci->rom.size)
p = seprint(p, e, "\tROM %.8ulX (%.8uX)\n",
p = seprint(p, e, "\tROM %.8ullX (%.8uX)\n",
pci->rom.bar, pci->rom.size);
pci = pci->list;
}

2
sys/src/9/pc/devvga.c
View file

@ -188,7 +188,7 @@ vgaread(Chan* c, void* a, long n, vlong off)
p = seprint(p, e, "hwaccel %s\n", hwaccel ? "on" : "off");
p = seprint(p, e, "hwblank %s\n", hwblank ? "on" : "off");
p = seprint(p, e, "panning %s\n", panning ? "on" : "off");
p = seprint(p, e, "addr p %#p v %#p size %#ux\n",
p = seprint(p, e, "addr p 0x%.8llux v %#p size %#ux\n",
scr->paddr, scr->vaddr, scr->apsize);
p = seprint(p, e, "softscreen %s\n", scr->softscreen ? "on" : "off");
USED(p);

5
sys/src/9/pc/ether82543gc.c
View file

@ -350,7 +350,7 @@ enum {
typedef struct Ctlr Ctlr;
typedef struct Ctlr {
int port;
uvlong port;
Pcidev* pcidev;
Ctlr* next;
int active;
@ -1252,11 +1252,14 @@ gc82543pci(void)
void *mem;
Pcidev *p;
Ctlr *ctlr;
uvlong io;
p = nil;
while(p = pcimatch(p, 0, 0)){
if(p->ccrb != 0x02 || p->ccru != 0)
continue;
if(p->mem[0].bar & 1)
continue;
switch((p->did<<16)|p->vid){
case (0x1000<<16)|0x8086: /* LSI L2A1157 (82542) */

13
sys/src/9/pc/ether82563.c
View file

@ -502,7 +502,7 @@ typedef void (*Freefn)(Block*);
typedef struct Ctlr Ctlr;
struct Ctlr {
ulong port;
uvlong port;
Pcidev *pcidev;
Ctlr *next;
int active;
@ -1667,7 +1667,10 @@ fload(Ctlr *c)
if(c->pcidev->mem[1].bar == 0)
return fload32(c); /* i219 */
va = vmap(c->pcidev->mem[1].bar & ~0x0f, c->pcidev->mem[1].size);
if(c->pcidev->mem[1].bar & 1)
return -1;
va = vmap(c->pcidev->mem[1].bar & ~0xF, c->pcidev->mem[1].size);
if(va == nil)
return -1;
f.reg = va;
@ -2025,6 +2028,8 @@ i82563pci(void)
for(p = nil; p = pcimatch(p, 0x8086, 0);){
hbafixup(p);
if(p->mem[0].bar & 1)
continue;
if((type = didtype(p->did)) == -1)
continue;
ctlr = malloc(sizeof(Ctlr));
@ -2035,7 +2040,7 @@ i82563pci(void)
ctlr->type = type;
ctlr->pcidev = p;
ctlr->rbsz = ROUND(cttab[type].mtu, 1024);
ctlr->port = p->mem[0].bar & ~0x0F;
ctlr->port = p->mem[0].bar & ~0xF;
if(i82563ctlrhead != nil)
i82563ctlrtail->next = ctlr;
else
@ -2052,7 +2057,7 @@ setup(Ctlr *ctlr)
p = ctlr->pcidev;
ctlr->nic = vmap(ctlr->port, p->mem[0].size);
if(ctlr->nic == nil){
print("%s: can't map 0x%lux\n", cname(ctlr), ctlr->port);
print("%s: can't map %llux\n", cname(ctlr), ctlr->port);
return -1;
}
pcienable(p);

14
sys/src/9/pc/ether82598.c
View file

@ -267,7 +267,7 @@ enum {
typedef struct {
Pcidev *p;
Ether *edev;
uintptr io;
uvlong io;
u32int *reg;
u32int *regmsi;
uchar flag;
@ -848,7 +848,7 @@ interrupt(Ureg*, void *v)
static void
scan(void)
{
uintptr io, iomsi;
uvlong io, iomsi;
void *mem, *memmsi;
int pciregs, pcimsix;
Ctlr *c;
@ -856,6 +856,7 @@ scan(void)
p = 0;
while(p = pcimatch(p, 0x8086, 0)){
pciregs = 0;
switch(p->did){
case 0x10c6: /* 82598 af dual port */
case 0x10c7: /* 82598 af single port */
@ -868,11 +869,12 @@ scan(void)
case 0x1528: /* T540-T1 */
pcimsix = 4;
break;
default:
continue;
}
pciregs = 0;
if((p->mem[pciregs].bar & 1) != 0
|| (p->mem[pcimsix].bar & 1) != 0)
continue;
if(nctlr == nelem(ctlrtab)){
print("i82598: too many controllers\n");
return;
@ -885,14 +887,14 @@ scan(void)
io = p->mem[pciregs].bar & ~0xf;
mem = vmap(io, p->mem[pciregs].size);
if(mem == nil){
print("i82598: can't map regs %#p\n", io);
print("i82598: can't map regs %llux\n", io);
free(c);
continue;
}
iomsi = p->mem[pcimsix].bar & ~0xf;
memmsi = vmap(iomsi, p->mem[pcimsix].size);
if(memmsi == nil){
print("i82598: can't map msi-x regs %#p\n", iomsi);
print("i82598: can't map msi-x regs %llux\n", iomsi);
vunmap(mem, p->mem[pciregs].size);
free(c);
continue;

13
sys/src/9/pc/etherbcm.c
View file

@ -23,11 +23,11 @@ typedef struct Ctlr Ctlr;
struct Ctlr {
Lock txlock, imlock;
Ctlr *link;
uvlong port;
Pcidev *pdev;
ulong *nic, *status;
/* One Ring to find them, One Ring to bring them all and in the darkness bind them */
ulong *recvret, *recvprod, *sendr;
ulong port;
ulong recvreti, recvprodi, sendri, sendcleani;
Block **sends, **recvs;
int active, duplex;
@ -704,6 +704,9 @@ bcmpci(void)
continue;
if(pdev->vid != 0x14e4)
continue;
if(pdev->mem[0].bar & 1)
continue;
switch(pdev->did){
default:
continue;
@ -790,7 +793,6 @@ bcmpci(void)
case 0x1670: /* ??? */
break;
}
ctlr = malloc(sizeof(Ctlr));
if(ctlr == nil) {
print("bcm: unable to alloc Ctlr\n");
@ -805,16 +807,17 @@ bcmpci(void)
free(ctlr);
continue;
}
mem = vmap(pdev->mem[0].bar & ~0x0F, pdev->mem[0].size);
ctlr->port = pdev->mem[0].bar & ~0xF;
mem = vmap(ctlr->port, pdev->mem[0].size);
if(mem == nil) {
print("bcm: can't map %8.8luX\n", pdev->mem[0].bar);
print("bcm: can't map %llux\n", ctlr->port);
free(ctlr->sends);
free(ctlr->recvs);
free(ctlr);
continue;
}
ctlr->pdev = pdev;
ctlr->nic = mem;
ctlr->port = pdev->mem[0].bar & ~0x0F;
ctlr->status = xspanalloc(20, 16, 0);
ctlr->recvprod = xspanalloc(32 * RecvProdRingLen, 16, 0);
ctlr->recvret = xspanalloc(32 * RecvRetRingLen, 16, 0);

12
sys/src/9/pc/etherdp83820.c
View file

@ -342,7 +342,7 @@ enum {
typedef struct Ctlr Ctlr;
typedef struct Ctlr {
int port;
uvlong port;
Pcidev* pcidev;
Ctlr* next;
int active;
@ -1148,6 +1148,8 @@ dp83820pci(void)
while(p = pcimatch(p, 0, 0)){
if(p->ccrb != Pcibcnet || p->ccru != Pciscether)
continue;
if(p->mem[1].bar & 1)
continue;
switch((p->did<<16)|p->vid){
default:
@ -1156,9 +1158,9 @@ dp83820pci(void)
break;
}
mem = vmap(p->mem[1].bar & ~0x0F, p->mem[1].size);
if(mem == 0){
print("DP83820: can't map %8.8luX\n", p->mem[1].bar);
mem = vmap(p->mem[1].bar & ~0xF, p->mem[1].size);
if(mem == nil){
print("DP83820: can't map %llux\n", p->mem[1].bar & ~0xF);
continue;
}
@ -1167,7 +1169,7 @@ dp83820pci(void)
print("DP83820: can't allocate memory\n");
continue;
}
ctlr->port = p->mem[1].bar & ~0x0F;
ctlr->port = p->mem[1].bar & ~0xF;
ctlr->pcidev = p;
pcienable(p);
ctlr->id = (p->did<<16)|p->vid;

6
sys/src/9/pc/etherelnk3.c
View file

@ -425,7 +425,7 @@ typedef struct Ctlr {
int ts; /* threshold shift */
int upenabled;
int dnenabled;
ulong cbfnpa; /* CardBus functions */
uvlong cbfnpa; /* CardBus functions */
ulong* cbfn;
} Ctlr;
@ -1496,12 +1496,12 @@ tcm59Xpci(void)
case 0x5157:
ctlr->eepromcmd = EepromRead8bRegister;
ctlr->cbfnpa = p->mem[2].bar&~0x0F;
ctlr->cbfn = vmap(p->mem[2].bar&~0x0F, p->mem[2].size);
ctlr->cbfn = vmap(ctlr->cbfnpa, p->mem[2].size);
break;
case 0x6056:
ctlr->eepromcmd = EepromReadOffRegister;
ctlr->cbfnpa = p->mem[2].bar&~0x0F;
ctlr->cbfn = vmap(p->mem[2].bar&~0x0F, p->mem[2].size);
ctlr->cbfn = vmap(ctlr->cbfnpa, p->mem[2].size);
break;
}
pcisetbme(p);

14
sys/src/9/pc/etherga620.c
View file

@ -251,7 +251,7 @@ enum {
typedef struct Ctlr Ctlr;
struct Ctlr {
int port;
uvlong port;
Pcidev* pcidev;
Ctlr* next;
int active;
@ -575,7 +575,7 @@ ga620event(Ether *edev, int eci, int epi)
* 3rd arg of 1 selects gigabit only; 2 10/100 only.
*/
ga620command(ctlr, 0x0B, 0x00, 0x00);
print("#l%d: ga620: port %8.8uX: firmware is up\n",
print("#l%d: ga620: port %8.8lluX: firmware is up\n",
edev->ctlrno, ctlr->port);
break;
case 0x04: /* statistics updated */
@ -1152,6 +1152,8 @@ ga620pci(void)
while(p = pcimatch(p, 0, 0)){
if(p->ccrb != 0x02 || p->ccru != 0)
continue;
if(p->mem[0].bar & 1)
continue;
switch(p->did<<16 | p->vid){
default:
@ -1165,9 +1167,9 @@ ga620pci(void)
break;
}
mem = vmap(p->mem[0].bar & ~0x0F, p->mem[0].size);
if(mem == 0){
print("ga620: can't map %8.8luX\n", p->mem[0].bar);
mem = vmap(p->mem[0].bar & ~0xF, p->mem[0].size);
if(mem == nil){
print("ga620: can't map %llux\n", p->mem[0].bar & ~0xF);
continue;
}
@ -1176,7 +1178,7 @@ ga620pci(void)
print("ga620: can't allocate memory\n");
continue;
}
ctlr->port = p->mem[0].bar & ~0x0F;
ctlr->port = p->mem[0].bar & ~0xF;
ctlr->pcidev = p;
pcienable(p);

8
sys/src/9/pc/etherigbe.c
View file

@ -451,7 +451,7 @@ enum {
typedef struct Ctlr Ctlr;
typedef struct Ctlr {
int port;
uvlong port;
Pcidev* pcidev;
Ctlr* next;
Ether* edev;
@ -1919,6 +1919,8 @@ igbepci(void)
while(p = pcimatch(p, 0, 0)){
if(p->ccrb != 0x02 || p->ccru != 0)
continue;
if(p->mem[0].bar & 1)
continue;
switch((p->did<<16)|p->vid){
default:
@ -1942,9 +1944,9 @@ igbepci(void)
break;
}
mem = vmap(p->mem[0].bar & ~0x0F, p->mem[0].size);
mem = vmap(p->mem[0].bar & ~0xF, p->mem[0].size);
if(mem == nil){
print("igbe: can't map %8.8luX\n", p->mem[0].bar);
print("igbe: can't map %llux\n", p->mem[0].bar & ~0xF);
continue;
}
cls = pcicfgr8(p, PciCLS);

10
sys/src/9/pc/etheriwl.c
View file

@ -321,11 +321,11 @@ struct Ctlr {
QLock;
Ctlr *link;
uvlong port;
Pcidev *pdev;
Wifi *wifi;
int type;
int port;
int power;
int active;
int broken;
@ -2457,6 +2457,8 @@ iwlpci(void)
continue;
if(pdev->vid != 0x8086)
continue;
if(pdev->mem[0].bar & 1)
continue;
switch(pdev->did){
default:
@ -2493,10 +2495,10 @@ iwlpci(void)
print("iwl: unable to alloc Ctlr\n");
continue;
}
ctlr->port = pdev->mem[0].bar & ~0x0F;
mem = vmap(pdev->mem[0].bar & ~0x0F, pdev->mem[0].size);
ctlr->port = pdev->mem[0].bar & ~0xF;
mem = vmap(ctlr->port, pdev->mem[0].size);
if(mem == nil) {
print("iwl: can't map %8.8luX\n", pdev->mem[0].bar);
print("iwl: can't map %llux\n", ctlr->port);
free(ctlr);
continue;
}

17
sys/src/9/pc/etherm10g.c
View file

@ -192,11 +192,11 @@ typedef struct {
typedef struct Ctlr Ctlr;
typedef struct Ctlr {
QLock;
int state;
int kprocs;
uvlong port;
Pcidev* pcidev;
Ctlr* next;
int state;
int kprocs;
int active;
int id; /* do we need this? */
@ -808,23 +808,24 @@ ctlrfree(Ctlr *c)
static int
setmem(Pcidev *p, Ctlr *c)
{
ulong i;
uvlong raddr;
Done *d;
void *mem;
Done *d;
ulong i;
c->tx.segsz = 2048;
c->ramsz = 2*MiB - (2*48*KiB + 32*KiB) - 0x100;
if(c->ramsz > p->mem[0].size)
return -1;
raddr = p->mem[0].bar & ~0x0F;
if(p->mem[0].bar & 1)
return -1;
raddr = p->mem[0].bar & ~0xF;
mem = vmap(raddr, p->mem[0].size);
if(mem == nil){
print("m10g: can't map %8.8lux\n", p->mem[0].bar);
print("m10g: can't map %llux\n", raddr);
return -1;
}
dprint("%llux <- vmap(mem[0].size = %ux)\n", raddr, p->mem[0].size);
dprint("%llux <- vmap(mem[0].size = %d)\n", raddr, p->mem[0].size);
c->port = raddr;
c->ram = mem;
c->cmd = malign(sizeof *c->cmd);

11
sys/src/9/pc/etherrt2860.c
View file

@ -925,6 +925,7 @@ struct Ctlr {
QLock;
Ctlr *link;
uvlong port;
Pcidev *pdev;
Wifi *wifi;
@ -967,8 +968,6 @@ struct Ctlr {
u32int txpow40mhz_5ghz[5];
int flags;
int port;
int power;
int active;
int broken;
@ -3480,6 +3479,8 @@ rt2860pci(void)
continue;
if(pdev->vid != 0x1814) /* Ralink */
continue;
if(pdev->mem[0].bar & 1)
continue;
switch(pdev->did){
default:
@ -3494,10 +3495,10 @@ rt2860pci(void)
print("rt2860: unable to alloc Ctlr\n");
continue;
}
ctlr->port = pdev->mem[0].bar & ~0x0F;
mem = vmap(pdev->mem[0].bar & ~0x0F, pdev->mem[0].size);
ctlr->port = pdev->mem[0].bar & ~0xF;
mem = vmap(ctlr->port, pdev->mem[0].size);
if(mem == nil){
print("rt2860: can't map %8.8luX\n", pdev->mem[0].bar);
print("rt2860: can't map %llux\n", ctlr->port);
free(ctlr);
continue;
}

8
sys/src/9/pc/etherwavelan.c
View file

@ -111,8 +111,9 @@ wavelanpciscan(void)
/*
* On the Prism, bar[0] is the memory-mapped register address (4KB),
*/
if(p->mem[0].size != 4096){
print("wavelanpci: %.4ux %.4ux: unlikely mmio size\n", p->vid, p->did);
if((p->mem[0].bar & 1) != 0 || p->mem[0].size != 4096){
print("wavelanpci: %.4ux %.4ux: unlikely mmio bar %llux size %d\n",
p->vid, p->did, p->mem[0].bar, p->mem[0].size);
continue;
}
@ -124,7 +125,8 @@ wavelanpciscan(void)
ctlr->pcidev = p;
mem = vmap(p->mem[0].bar&~0xF, p->mem[0].size);
if(mem == nil){
print("wavelanpci: %.4ux %.4ux: vmap 0x%.8lux %d failed\n", p->vid, p->did, p->mem[0].bar&~0xF, p->mem[0].size);
print("wavelanpci: %.4ux %.4ux: vmap %llux %d failed\n",
p->vid, p->did, p->mem[0].bar&~0xF, p->mem[0].size);
free(ctlr);
continue;
}

11
sys/src/9/pc/etherwpi.c
View file

@ -235,10 +235,10 @@ struct Ctlr {
QLock;
Ctlr *link;
uvlong port;
Pcidev *pdev;
Wifi *wifi;
int port;
int power;
int active;
int broken;
@ -1789,6 +1789,9 @@ wpipci(void)
break;
}
if(pdev->mem[0].bar & 1)
continue;
/* Clear device-specific "PCI retry timeout" register (41h). */
if(pcicfgr8(pdev, 0x41) != 0)
pcicfgw8(pdev, 0x41, 0);
@ -1798,10 +1801,10 @@ wpipci(void)
print("wpi: unable to alloc Ctlr\n");
continue;
}
ctlr->port = pdev->mem[0].bar & ~0x0F;
mem = vmap(pdev->mem[0].bar & ~0x0F, pdev->mem[0].size);
ctlr->port = pdev->mem[0].bar & ~0xF;
mem = vmap(ctlr->port, pdev->mem[0].size);
if(mem == nil) {
print("wpi: can't map %8.8luX\n", pdev->mem[0].bar);
print("wpi: can't map %llux\n", ctlr->port);
free(ctlr);
continue;
}

21
sys/src/9/pc/etherx550.c
View file

@ -804,12 +804,10 @@ interrupt(Ureg*, void *v)
iunlock(&c->imlock);
}
extern void addvgaseg(char*, ulong, ulong);
static void
scan(void)
{
uintptr io, iomsi;
uvlong io, iomsi;
void *mem, *memmsi;
int pciregs, pcimsix;
Ctlr *c;
@ -819,6 +817,9 @@ scan(void)
while(p = pcimatch(p, 0x8086, 0x15c8)){ /* X553/X550-AT 10GBASE-T */
pcimsix = 4;
pciregs = 0;
if((p->mem[pciregs].bar & 1) != 0
|| (p->mem[pcimsix].bar & 1) != 0)
continue;
if(nctlr == nelem(ctlrtab)){
print("iX550: too many controllers\n");
return;
@ -828,21 +829,17 @@ scan(void)
print("iX550: can't allocate memory\n");
continue;
}
io = p->mem[pciregs].bar & ~0xf;
io = p->mem[pciregs].bar & ~0xF;
mem = vmap(io, p->mem[pciregs].size);
if(mem == nil){
print("iX550: can't map regs %#p\n", io);
print("iX550: can't map regs %llux\n", io);
free(c);
continue;
}
if (nctlr == 0)
addvgaseg("pci.ctlr0.bar0", p->mem[pciregs].bar & ~0xf, p->mem[pciregs].size);
else if (nctlr == 1)
addvgaseg("pci.ctlr1.bar0", p->mem[pciregs].bar & ~0xf, p->mem[pciregs].size);
iomsi = p->mem[pcimsix].bar & ~0xf;
iomsi = p->mem[pcimsix].bar & ~0xF;
memmsi = vmap(iomsi, p->mem[pcimsix].size);
if(memmsi == nil){
print("iX550: can't map msi-x regs %#p\n", iomsi);
print("iX550: can't map msi-x regs %llux\n", iomsi);
vunmap(mem, p->mem[pciregs].size);
free(c);
continue;
@ -855,9 +852,9 @@ scan(void)
c->rbsz = ROUND(Mtu, 1024);
if(reset(c)){
print("iX550: can't reset\n");
free(c);
vunmap(mem, p->mem[pciregs].size);
vunmap(memmsi, p->mem[pcimsix].size);
free(c);
continue;
}
pcisetbme(p);

6
sys/src/9/pc/etheryuk.c
View file

@ -680,7 +680,7 @@ struct Ctlr {
uchar rev;
uchar nports;
uchar portno;
uintptr io;
uvlong io;
uchar *reg8;
ushort *reg16;
uint *reg;
@ -2129,10 +2129,12 @@ setup(Ctlr *c)
Pcidev *p;
p = c->p;
if(p->mem[0].bar & 1)
return -1;
c->io = p->mem[0].bar&~0xf;
mem = vmap(c->io, p->mem[0].size);
if(mem == nil){
print("yuk: cant map %#p\n", c->io);
print("yuk: cant map %llux\n", c->io);
return -1;
}
pcienable(p);

8
sys/src/9/pc/fns.h
View file

@ -126,7 +126,7 @@ void outsl(int, void*, int);
ulong paddr(void*);
void patwc(void*, int);
ulong pcibarsize(Pcidev*, int);
void pcibussize(Pcidev*, ulong*, ulong*);
void pcibussize(Pcidev*, uvlong*, ulong*);
int pcicfgr8(Pcidev*, int);
int pcicfgr16(Pcidev*, int);
int pcicfgr32(Pcidev*, int);
@ -192,10 +192,10 @@ int tas(void*);
uvlong tscticks(uvlong*);
ulong umballoc(ulong, ulong, ulong);
void umbfree(ulong, ulong);
ulong upaalloc(ulong, ulong, ulong);
void upafree(ulong, ulong);
uvlong upaalloc(uvlong, ulong, ulong);
void upafree(uvlong, ulong);
void vectortable(void);
void* vmap(ulong, int);
void* vmap(uvlong, int);
int vmapsync(ulong);
void vmxprocrestore(Proc *);
void vmxshutdown(void);

14
sys/src/9/pc/io.h
View file

@ -232,14 +232,6 @@ enum {
PciCapHSW = 0x0c, /* hot swap */
};
typedef struct Pcisiz Pcisiz;
struct Pcisiz
{
Pcidev* dev;
int siz;
int bar;
};
typedef struct Pcidev Pcidev;
struct Pcidev
{
@ -257,12 +249,12 @@ struct Pcidev
uchar ltr;
struct {
ulong bar; /* base address */
uvlong bar; /* base address */
int size;
} mem[6];
struct {
ulong bar;
uvlong bar;
int size;
} rom;
uchar intl; /* interrupt line */
@ -273,7 +265,7 @@ struct Pcidev
Pcidev* parent; /* up a bus */
Pcidev* bridge; /* down a bus */
struct {
ulong bar;
uvlong bar;
int size;
} ioa, mema;

8
sys/src/9/pc/memory.c
View file

@ -244,14 +244,14 @@ rsdsearch(void)
* does not map the physical address into virtual memory.
* Call vmap to do that.
*/
ulong
upaalloc(ulong pa, ulong size, ulong align)
uvlong
upaalloc(uvlong pa, ulong size, ulong align)
{
return (ulong)memmapalloc(pa == -1UL ? -1ULL : (uvlong)pa, size, align, MemUPA);
return memmapalloc(pa, size, align, MemUPA);
}
void
upafree(ulong pa, ulong size)
upafree(uvlong pa, ulong size)
{
memmapfree(pa, size, MemUPA);
}

15
sys/src/9/pc/mmu.c
View file

@ -71,7 +71,6 @@ mmuinit(void)
{
ulong x, *p;
ushort ptr[3];
vlong v;
if(0) print("vpt=%#.8ux vpd=%#p kmap=%#.8ux\n",
VPT, vpd, KMAP);
@ -537,11 +536,16 @@ static void pdbunmap(ulong*, ulong, int);
* Add a device mapping to the vmap range.
*/
void*
vmap(ulong pa, int size)
vmap(uvlong pa, int size)
{
int osize;
ulong o, va;
if(pa < BY2PG || size <= 0 || ((pa+size) >> 32) != 0 || size > VMAPSIZE){
print("vmap pa=%llux size=%d pc=%#p\n", pa, size, getcallerpc(&pa));
return nil;
}
/*
* might be asking for less than a page.
*/
@ -549,17 +553,12 @@ vmap(ulong pa, int size)
o = pa & (BY2PG-1);
pa -= o;
size += o;
size = ROUND(size, BY2PG);
if(pa == 0){
print("vmap pa=0 pc=%#p\n", getcallerpc(&pa));
return nil;
}
ilock(&vmaplock);
if((va = vmapalloc(size)) == 0
|| pdbmap(MACHP(0)->pdb, pa|PTEUNCACHED|PTEWRITE, va, size) < 0){
iunlock(&vmaplock);
return 0;
return nil;
}
iunlock(&vmaplock);
/* avoid trap on local processor

89
sys/src/9/pc/pci.c
View file

@ -35,6 +35,15 @@ enum
SErrEn = (1<<8),
};
typedef struct Pcisiz Pcisiz;
struct Pcisiz
{
Pcidev* dev;
int siz;
int bar;
int typ;
};
static Lock pcicfglock;
static Lock pcicfginitlock;
static int pcicfgmode = -1;
@ -156,11 +165,12 @@ pcimask(ulong v)
}
static void
pcibusmap(Pcidev *root, ulong *pmema, ulong *pioa, int wrreg)
pcibusmap(Pcidev *root, uvlong *pmema, ulong *pioa, int wrreg)
{
Pcidev *p;
int ntb, i, size, rno, hole;
ulong v, mema, ioa, sioa, smema, base, limit;
uvlong mema, smema, base, limit;
ulong ioa, sioa, v;
Pcisiz *table, *tptr, *mtb, *itb;
if(!nobios)
@ -169,7 +179,7 @@ pcibusmap(Pcidev *root, ulong *pmema, ulong *pioa, int wrreg)
ioa = *pioa;
mema = *pmema;
DBG("pcibusmap wr=%d %T mem=%luX io=%luX\n",
DBG("pcibusmap wr=%d %T mem=%lluX io=%luX\n",
wrreg, root->tbdf, mema, ioa);
ntb = 0;
@ -211,16 +221,18 @@ pcibusmap(Pcidev *root, ulong *pmema, ulong *pioa, int wrreg)
itb->dev = p;
itb->bar = -1;
itb->siz = p->ioa.size;
itb->typ = 0;
itb++;
mtb->dev = p;
mtb->bar = -1;
mtb->siz = p->mema.size;
mtb->typ = 0;
mtb++;
continue;
}
for(i = 0; i <= 5; i++) {
for(i = 0; i < nelem(p->mem); i++) {
rno = PciBAR0 + i*4;
v = pcicfgrw32(p->tbdf, rno, 0, 1);
size = pcibarsize(p, rno);
@ -232,16 +244,17 @@ pcibusmap(Pcidev *root, ulong *pmema, ulong *pioa, int wrreg)
itb->dev = p;
itb->bar = i;
itb->siz = size;
itb->typ = 1;
itb++;
}
else {
mtb->dev = p;
mtb->bar = i;
mtb->siz = size;
mtb++;
if((v & 7) == 4)
mtb->typ = v & 7;
if(mtb->typ & 4)
i++;
mtb++;
}
}
}
@ -282,16 +295,23 @@ pcibusmap(Pcidev *root, ulong *pmema, ulong *pioa, int wrreg)
hole = tptr->siz;
if(tptr->bar == -1)
hole = 1<<20;
mema = (mema+hole-1) & ~(hole-1);
mema = (mema+hole-1) & ~((uvlong)hole-1);
p = tptr->dev;
if(tptr->bar == -1)
p->mema.bar = mema;
else {
p->pcr |= MEMen;
p->mem[tptr->bar].bar = mema;
if(wrreg)
pcicfgrw32(p->tbdf, PciBAR0+(tptr->bar*4), mema, 0);
p->mem[tptr->bar].bar = mema|tptr->typ;
if(wrreg){
rno = PciBAR0+(tptr->bar*4);
pcicfgrw32(p->tbdf, rno, mema|tptr->typ, 0);
if(tptr->bar < nelem(p->mem)-1 && (tptr->typ & 4) != 0){
p->mem[tptr->bar+1].bar = 0;
p->mem[tptr->bar+1].size = 0;
pcicfgrw32(p->tbdf, rno+4, mema>>32, 0);
}
}
}
mema += tptr->siz;
}
@ -425,21 +445,14 @@ pcilscan(int bno, Pcidev** list, Pcidev *parent)
if((hdt & 0x7F) != 0)
break;
rno = PciBAR0;
for(i = 0; i <= 5; i++) {
p->mem[i].bar = pcicfgr32(p, rno);
for(i = 0; i < nelem(p->mem); i++) {
p->mem[i].bar = (ulong)pcicfgr32(p, rno);
p->mem[i].size = pcibarsize(p, rno);
if((p->mem[i].bar & 7) == 4 && i < 5){
ulong hi;
if((p->mem[i].bar & 7) == 4 && i < nelem(p->mem)-1){
rno += 4;
hi = pcicfgr32(p, rno);
if(hi != 0){
print("ignoring 64-bit bar %d: %llux %d from %T\n",
i, (uvlong)hi<<32 | p->mem[i].bar, p->mem[i].size, p->tbdf);
p->mem[i].bar = 0;
p->mem[i].size = 0;
}
i++;
p->mem[i++].bar |= (uvlong)pcicfgr32(p, rno) << 32;
p->mem[i].bar = 0;
p->mem[i].size = 0;
}
rno += 4;
}
@ -923,7 +936,7 @@ pcibiosinit(void)
}
void
pcibussize(Pcidev *root, ulong *msize, ulong *iosize)
pcibussize(Pcidev *root, uvlong *msize, ulong *iosize)
{
*msize = 0;
*iosize = 0;
@ -935,7 +948,8 @@ pcicfginit(void)
{
char *p;
Pcidev **list;
ulong mema, ioa;
uvlong mema;
ulong ioa;
int bno, n, pcibios;
lock(&pcicfginitlock);
@ -1052,10 +1066,10 @@ pcicfginit(void)
ioa = 0x1000;
mema = 0x90000000;
DBG("Mask sizes: mem=%lux io=%lux\n", mema, ioa);
DBG("Mask sizes: mem=%llux io=%lux\n", mema, ioa);
pcibusmap(pciroot, &mema, &ioa, 1);
DBG("Sizes2: mem=%lux io=%lux\n", mema, ioa);
DBG("Sizes2: mem=%llux io=%lux\n", mema, ioa);
goto out;
}
@ -1083,8 +1097,8 @@ pcireservemem(void)
*/
for(p=pciroot; p; p=p->list)
for(i=0; i<nelem(p->mem); i++)
if((p->mem[i].bar&~4) != 0 && (p->mem[i].bar&1) == 0)
upaalloc(p->mem[i].bar&~0x0F, p->mem[i].size, 0);
if(p->mem[i].size && (p->mem[i].bar&1) == 0 && (p->mem[i].bar&~0xF) != 0)
upaalloc(p->mem[i].bar&~0xF, p->mem[i].size, 0);
}
static int
@ -1330,13 +1344,13 @@ pcilhinv(Pcidev* p)
for(i = 0; i < nelem(p->mem); i++) {
if(t->mem[i].size == 0)
continue;
print("%d:%.8lux %d ", i,
print("%d:%.8llux %d ", i,
t->mem[i].bar, t->mem[i].size);
}
if(t->ioa.bar || t->ioa.size)
print("ioa:%.8lux %d ", t->ioa.bar, t->ioa.size);
print("ioa:%.8llux %d ", t->ioa.bar, t->ioa.size);
if(t->mema.bar || t->mema.size)
print("mema:%.8lux %d ", t->mema.bar, t->mema.size);
print("mema:%.8llux %d ", t->mema.bar, t->mema.size);
if(t->bridge)
print("->%d", BUSBNO(t->bridge->tbdf));
print("\n");
@ -1589,8 +1603,13 @@ pcienable(Pcidev *p)
delay(100); /* D3: minimum delay 50ms */
/* restore registers */
for(i = 0; i < 6; i++)
for(i = 0; i < nelem(p->mem); i++){
pcicfgw32(p, PciBAR0+i*4, p->mem[i].bar);
if((p->mem[i].bar&7) == 4 && i < nelem(p->mem)-1){
pcicfgw32(p, PciBAR0+i*4+4, p->mem[i].bar>>32);
i++;
}
}
pcicfgw8(p, PciINTL, p->intl);
pcicfgw8(p, PciLTR, p->ltr);
pcicfgw8(p, PciCLS, p->cls);
@ -1602,7 +1621,7 @@ pcienable(Pcidev *p)
pcr = IOen|MEMen|MASen;
else {
pcr = 0;
for(i = 0; i < 6; i++){
for(i = 0; i < nelem(p->mem); i++){
if(p->mem[i].size == 0)
continue;
if(p->mem[i].bar & 1)

4
sys/src/9/pc/pcmciamodem.c
View file

@ -68,9 +68,9 @@ pcmciamodemlink(void)
com2used = 1;
if(ioalloc(isa.port, 8, 0, modems[j]) < 0)
print("%s port %lux already in use\n",
modems[j], isa.port);
modems[j], (ulong)isa.port);
print("%s in pcmcia slot %d port 0x%lux irq %d\n",
modems[j], slot, isa.port, isa.irq);
modems[j], slot, (ulong)isa.port, isa.irq);
}
}
}

2
sys/src/9/pc/pmmc.c
View file

@ -231,7 +231,7 @@ pmmcinit(void)
}
}
if(p == nil || p->mem[0].size < 256)
if(p == nil || p->mem[0].size < 256 || (p->mem[0].bar & 1) != 0)
return -1;
pmmc->mmio = vmap(p->mem[0].bar & ~0x0F, p->mem[0].size);

25
sys/src/9/pc/screen.c
View file

@ -95,7 +95,7 @@ int
screenaperture(int size, int align)
{
VGAscr *scr;
ulong pa;
uvlong pa;
scr = &vgascreen[0];
@ -115,7 +115,7 @@ screenaperture(int size, int align)
* The driver will tell the card to use it.
*/
size = PGROUND(size);
pa = upaalloc(-1, size, align);
pa = upaalloc(-1ULL, size, align);
if(pa == -1)
return -1;
scr->paddr = pa;
@ -405,10 +405,10 @@ blankscreen(int blank)
}
static char*
vgalinearaddr0(VGAscr *scr, ulong paddr, int size)
vgalinearaddr0(VGAscr *scr, uvlong paddr, int size)
{
int x, nsize;
ulong npaddr;
uvlong npaddr;
/*
* new approach. instead of trying to resize this
@ -455,8 +455,8 @@ vgalinearaddr0(VGAscr *scr, ulong paddr, int size)
static char*
vgalinearpci0(VGAscr *scr)
{
ulong paddr;
int i, size, best;
uvlong paddr;
Pcidev *p;
p = scr->pci;
@ -505,7 +505,7 @@ vgalinearpci(VGAscr *scr)
}
void
vgalinearaddr(VGAscr *scr, ulong paddr, int size)
vgalinearaddr(VGAscr *scr, uvlong paddr, int size)
{
char *err;
@ -514,15 +514,15 @@ vgalinearaddr(VGAscr *scr, ulong paddr, int size)
}
static char*
bootmapfb(VGAscr *scr, ulong pa, ulong sz)
bootmapfb(VGAscr *scr, uvlong pa, ulong sz)
{
ulong start, end;
uvlong start, end;
Pcidev *p;
int i;
for(p = pcimatch(nil, 0, 0); p != nil; p = pcimatch(p, 0, 0)){
for(i=0; i<nelem(p->mem); i++){
if(p->mem[i].bar & 1)
if(p->mem[i].size == 0 || (p->mem[i].bar & 1) != 0)
continue;
start = p->mem[i].bar & ~0xF;
end = start + p->mem[i].size;
@ -575,7 +575,8 @@ bootscreeninit(void)
{
VGAscr *scr;
int x, y, z;
ulong chan, pa, sz;
uvlong pa;
ulong chan, sz;
char *s, *p, *err;
/* *bootscreen=WIDTHxHEIGHTxDEPTH CHAN PA [SZ] */
@ -603,7 +604,7 @@ bootscreeninit(void)
return;
sz = 0;
pa = strtoul(p+1, &s, 0);
pa = strtoull(p+1, &s, 0);
if(pa == 0)
return;
if(*s++ == ' ')
@ -658,7 +659,7 @@ bootscreenconf(VGAscr *scr)
conf[0] = '\0';
if(scr != nil && scr->paddr != 0 && scr->gscreen != nil)
snprint(conf, sizeof(conf), "%dx%dx%d %s %#p %d\n",
snprint(conf, sizeof(conf), "%dx%dx%d %s 0x%.8llux %d\n",
scr->gscreen->r.max.x, scr->gscreen->r.max.y,
scr->gscreen->depth, chantostr(chan, scr->gscreen->chan),
scr->paddr, scr->apsize);

6
sys/src/9/pc/screen.h
View file

@ -92,7 +92,7 @@ struct VGAscr {
int useflush;
uintptr paddr; /* frame buffer */
uvlong paddr; /* frame buffer */
void* vaddr;
int apsize;
@ -129,7 +129,7 @@ extern void mouseredraw(void);
extern int hwaccel; /* use hw acceleration */
extern int hwblank; /* use hw blanking */
extern int panning; /* use virtual screen panning */
extern void addvgaseg(char*, ulong, ulong);
extern void addvgaseg(char*, uvlong, ulong);
extern Memdata* attachscreen(Rectangle*, ulong*, int*, int*, int*);
extern void flushmemscreen(Rectangle);
extern void cursoron(void);
@ -154,7 +154,7 @@ extern QLock drawlock;
extern void vgascreenwin(VGAscr*);
extern void vgaimageinit(ulong);
extern void vgalinearpci(VGAscr*);
extern void vgalinearaddr(VGAscr*, ulong, int);
extern void vgalinearaddr(VGAscr*, uvlong, int);
extern void vgablank(VGAscr*, int);
extern Lock vgascreenlock;

11
sys/src/9/pc/sd53c8xx.c
View file

@ -2063,7 +2063,8 @@ sd53c8xxpnp(void)
void *scriptma;
Controller *ctlr;
SDev *sdev, *head, *tail;
ulong regpa, *script, scriptpa;
uvlong regpa, scriptpa;
ulong *script;
void *regva, *scriptva;
if(cp = getconf("*maxsd53c8xx"))
@ -2092,12 +2093,14 @@ sd53c8xxpnp(void)
continue;
ba++;
}
regpa &= ~0xF;
if(regpa == 0)
print("regpa 0\n");
regpa &= ~0xF;
regva = vmap(regpa, p->mem[1].size);
if(regva == 0)
if(regva == nil){
print("sd53c8xx: can't map %llux\n", regpa);
continue;
}
script = nil;
scriptpa = 0;
@ -2111,7 +2114,7 @@ sd53c8xxpnp(void)
}
scriptpa &= ~0x0F;
scriptva = vmap(scriptpa, p->mem[ba].size);
if(scriptva)
if(scriptva != nil)
script = scriptva;
}
if(scriptpa == 0){

7
sys/src/9/pc/sdiahci.c
View file

@ -2141,7 +2141,7 @@ static SDev*
iapnp(void)
{
int i, n, nunit, type;
uintptr io;
uvlong io;
Ctlr *c;
Drive *d;
Pcidev *p;
@ -2178,9 +2178,8 @@ iapnp(void)
memset(c, 0, sizeof *c);
memset(s, 0, sizeof *s);
c->mmio = vmap(io, p->mem[Abar].size);
if(c->mmio == 0){
print("%s: address %#p in use did %.4ux\n",
Tname(c), io, p->did);
if(c->mmio == nil){
print("%s: can't map %llux\n", Tname(c), io);
continue;
}
c->lmmio = (ulong*)c->mmio;

19
sys/src/9/pc/sdmv50xx.c
View file

@ -1131,8 +1131,9 @@ static SDev*
mv50pnp(void)
{
int i, nunit;
ulong n, *mem;
uchar *base;
ulong io, n, *mem;
uvlong io;
Ctlr *ctlr;
Drive *d;
Pcidev *p;
@ -1148,6 +1149,8 @@ mv50pnp(void)
while((p = pcimatch(p, 0x11ab, 0)) != nil){
if(p->ccrb != Pcibcstore || p->ccru + p->ccrp || p->did&0x0f00)
continue;
if(p->mem[0].size == 0 || (p->mem[0].bar & 1) != 0)
continue;
switch(p->did){
case 0x5040:
case 0x5041:
@ -1169,20 +1172,18 @@ mv50pnp(void)
'E' + ctlrno, (ushort)p->did, nunit,
((p->did&0xf000)==0x6000? "II": "I"),
(p->did&1? "": "out"));
io = p->mem[0].bar & ~0xF;
mem = (ulong*)vmap(io, p->mem[0].size);
if(mem == nil){
print("sdmv50xx: can't map %llux\n", io);
continue;
}
if((sdev = malloc(sizeof *sdev)) == nil)
continue;
if((ctlr = malloc(sizeof *ctlr)) == nil){
free(sdev);
continue;
}
io = p->mem[0].bar & ~0x0F;
mem = (ulong*)vmap(io, p->mem[0].size);
if(mem == 0){
print("sdmv50xx: address 0x%luX in use\n", io);
free(sdev);
free(ctlr);
continue;
}
ctlr->rid = p->rid;
/* avert thine eyes! (what does this do?) */

2
sys/src/9/pc/sdnvme.c
View file

@ -560,7 +560,7 @@ nvmepnpctlrs(void)
for(p = nil; p = pcimatch(p, 0, 0);){
if(p->ccrb != 1 || p->ccru != 8 || p->ccrp != 2)
continue;
if(p->mem[0].size == 0)
if(p->mem[0].size == 0 || (p->mem[0].bar & 1) != 0)
continue;
if((ctlr = malloc(sizeof(*ctlr))) == nil){
print("nvme: no memory for Ctlr\n");

11
sys/src/9/pc/sdodin.c
View file

@ -2542,10 +2542,9 @@ msverify(SDunit *u)
static uint*
map(Pcidev *p, int bar)
{
uintptr io;
io = p->mem[bar].bar & ~0xf;
return (uint*)vmap(io, p->mem[bar].size);
if(p->mem[bar].size == 0 || (p->mem[bar].bar & 1) != 0)
return nil;
return (uint*)vmap(p->mem[bar].bar & ~0xf, p->mem[bar].size);
}
/* §5.1.3 */
@ -2655,8 +2654,8 @@ mspnp(void)
s = sdevs + nmsctlr;
memset(c, 0, sizeof *c);
memset(s, 0, sizeof *s);
if((c->reg = map(p, Mebar)) == 0){
print("sdodin: bar %#p in use\n", c->reg);
if((c->reg = map(p, Mebar)) == nil){
print("sdodin: can't map registers\n");
continue;
}
pcienable(p);

23
sys/src/9/pc/uartaxp.c
View file

@ -759,8 +759,9 @@ axpalloc(int ctlrno, Pcidev* pcidev)
Ctlr *ctlr;
void *addr;
char name[64];
u32int bar, r;
u32int r;
int i, n, timeo;
uvlong io;
ctlr = malloc(sizeof(Ctlr));
if(ctlr == nil){
@ -775,25 +776,27 @@ axpalloc(int ctlrno, Pcidev* pcidev)
/*
* Access to runtime registers.
*/
bar = pcidev->mem[0].bar;
if((addr = vmap(bar & ~0x0F, pcidev->mem[0].size)) == 0){
print("%s: can't map registers at %#ux\n", ctlr->name, bar);
io = pcidev->mem[0].bar & ~0xF;
addr = vmap(io, pcidev->mem[0].size);
if(addr == nil){
print("%s: can't map registers at %llux\n", ctlr->name, io);
return axpdealloc(ctlr);
}
ctlr->reg = addr;
print("%s: port 0x%ux irq %d ", ctlr->name, bar, pcidev->intl);
print("%s: port 0x%llux irq %d ", ctlr->name, io, pcidev->intl);
/*
* Local address space 0.
*/
bar = pcidev->mem[2].bar;
if((addr = vmap(bar & ~0x0F, pcidev->mem[2].size)) == 0){
print("%s: can't map memory at %#ux\n", ctlr->name, bar);
io = pcidev->mem[2].bar & ~0xF;
addr = vmap(io, pcidev->mem[2].size);
if(addr == nil){
print("%s: can't map memory at %llux\n", ctlr->name, io);
return axpdealloc(ctlr);
}
ctlr->mem = addr;
ctlr->gcb = (Gcb*)(ctlr->mem+0x10000);
print("mem 0x%ux size %d: ", bar, pcidev->mem[2].size);
print("mem 0x%llux size %d: ", io, pcidev->mem[2].size);
pcienable(pcidev);
@ -914,6 +917,8 @@ axppnp(void)
for(p = pcimatch(nil, 0, 0); p != nil; p = pcimatch(p, 0, 0)){
if(p->ccrb != 0x07)
continue;
if((p->mem[0].bar & 1) != 0 || (p->mem[2].bar & 1) != 0)
continue;
switch((p->did<<16)|p->vid){
default:

11
sys/src/9/pc/usbehcipc.c
View file

@ -153,7 +153,7 @@ scanpci(void)
{
static int already = 0;
int i;
uintptr io;
uvlong io;
Ctlr *ctlr;
Pcidev *p;
Ecapio *capio;
@ -170,6 +170,8 @@ scanpci(void)
continue;
switch(p->ccrp){
case 0x20:
if(p->mem[0].bar & 1)
continue;
io = p->mem[0].bar & ~0x0f;
break;
default:
@ -178,7 +180,7 @@ scanpci(void)
if(io == 0)
continue;
print("usbehci: %#x %#x: port %#p size %#x irq %d\n",
print("usbehci: %#x %#x: port %llux size %d irq %d\n",
p->vid, p->did, io, p->mem[0].size, p->intl);
ctlr = malloc(sizeof(Ctlr));
@ -187,7 +189,8 @@ scanpci(void)
continue;
}
if((capio = vmap(io, p->mem[0].size)) == nil){
capio = vmap(io, p->mem[0].size);
if(capio == nil){
print("usbehci: cannot map mmio\n");
free(ctlr);
continue;
@ -210,7 +213,7 @@ scanpci(void)
*/
if (i >= maxehci) {
iprint("usbehci: ignoring controllers after first %d, "
"at %#p\n", maxehci, io);
"at %.8llux\n", maxehci, io);
ctlrs[i] = nil;
}
}

4
sys/src/9/pc/usbuhci.c
View file

@ -2129,7 +2129,9 @@ scanpci(void)
continue;
switch(p->ccrp){
case 0:
io = p->mem[4].bar & ~0x0F;
if((p->mem[4].bar & 1) == 0)
continue;
io = (int)p->mem[4].bar & ~0xF;
break;
default:
continue;

9
sys/src/9/pc/vga.c
View file

@ -252,14 +252,19 @@ vgablank(VGAscr*, int blank)
}
void
addvgaseg(char *name, ulong pa, ulong size)
addvgaseg(char *name, uvlong pa, ulong size)
{
Physseg seg;
if((uintptr)pa != pa || size == 0 || -(uintptr)pa < size){
print("addvgaseg %s: bad address %llux-%llux pc %#p\n",
name, pa, pa+size, getcallerpc(&name));
return;
}
memset(&seg, 0, sizeof seg);
seg.attr = SG_PHYSICAL | SG_DEVICE | SG_NOEXEC;
seg.name = name;
seg.pa = pa;
seg.pa = (uintptr)pa;
seg.size = size;
addphysseg(&seg);
}

3
sys/src/9/pc/vga3dfx.c
View file

@ -37,8 +37,9 @@ tdfxenable(VGAscr* scr)
if(scr->mmio)
return;
p = scr->pci;
if(p == nil || p->vid != 0x121A)
if(p == nil || p->vid != 0x121A || (p->mem[0].bar & 1) != 0)
return;
scr->mmio = vmap(p->mem[0].bar&~0x0F, p->mem[0].size);
if(scr->mmio == nil)
return;

6
sys/src/9/pc/vgaclgd546x.c
View file

@ -42,8 +42,10 @@ clgd546xenable(VGAscr* scr)
p = scr->pci;
if(p == nil)
return;
if(p->mem[1].bar & 1)
return;
scr->mmio = vmap(p->mem[1].bar&~0x0F, p->mem[1].size);
if(scr->mmio == 0)
if(scr->mmio == nil)
return;
addvgaseg("clgd546xmmio", p->mem[1].bar&~0x0F, p->mem[1].size);
}
@ -53,7 +55,7 @@ clgd546xcurdisable(VGAscr* scr)
{
Cursor546x *cursor546x;
if(scr->mmio == 0)
if(scr->mmio == nil)
return;
cursor546x = (Cursor546x*)((uchar*)scr->mmio+CursorMMIO);
cursor546x->enable = 0;

2
sys/src/9/pc/vgacyber938x.c
View file

@ -56,7 +56,7 @@ cyber938xlinear(VGAscr* scr, int, int)
* Heuristic to detect the MMIO space. We're flying blind
* here, with only the XFree86 source to guide us.
*/
if(p->mem[1].size == 0x20000)
if(p->mem[1].size == 0x20000 && (p->mem[1].bar & 1) == 0)
scr->mmio = vmap(p->mem[1].bar & ~0x0F, p->mem[1].size);
if(scr->apsize)

8
sys/src/9/pc/vgageode.c
View file

@ -32,9 +32,13 @@ geodeenable(VGAscr* scr)
if(scr->mmio)
return;
p = scr->pci;
if(!p) return;
if(p == nil)
return;
if((p->mem[1].bar | p->mem[2].bar | p->mem[3].bar) & 1)
return;
scr->mmio = vmap(p->mem[2].bar&~0x0F, p->mem[2].size);
if(!scr->mmio) return;
if(scr->mmio == nil)
return;
addvgaseg("geodegp", p->mem[1].bar&~0x0F, p->mem[1].size);
addvgaseg("geodemmio", p->mem[2].bar&~0x0F, p->mem[2].size);
addvgaseg("geodevid", p->mem[3].bar&~0x0F, p->mem[3].size);

8
sys/src/9/pc/vgai81x.c
View file

@ -55,15 +55,19 @@ i81xenable(VGAscr* scr)
{
Pcidev *p;
int size;
ulong *pgtbl, *rp, fbuf, fbend;
ulong *pgtbl, *rp;
uintptr fbuf, fbend;
if(scr->mmio)
return;
p = scr->pci;
if(p == nil)
return;
if((p->mem[0].bar & 1) != 0
|| (p->mem[1].bar & 1) != 0)
return;
scr->mmio = vmap(p->mem[1].bar & ~0x0F, p->mem[1].size);
if(scr->mmio == 0)
if(scr->mmio == nil)
return;
addvgaseg("i81xmmio", p->mem[1].bar&~0x0F, p->mem[1].size);

2
sys/src/9/pc/vgaigfx.c
View file

@ -42,6 +42,8 @@ igfxenable(VGAscr* scr)
p = scr->pci;
if(p == nil)
return;
if(p->mem[0].bar & 1)
return;
scr->mmio = vmap(p->mem[0].bar&~0x0F, p->mem[0].size);
if(scr->mmio == nil)
return;

3
sys/src/9/pc/vgamach64xx.c
View file

@ -174,7 +174,6 @@ mach64xxenable(VGAscr* scr)
* this will do for now.
*/
scr->io = p->mem[1].bar & ~0x03;
if(scr->io == 0)
scr->io = 0x2EC;
}
@ -1068,7 +1067,7 @@ ovl_status(VGAscr *scr, Chan *, char **field)
mach64type->m64_ovlclock,
mach64revb? "yes": "no",
mach64refclock);
pprint("%s: storage @%.8luX, aperture @%8.ulX, ovl buf @%.8ulX\n",
pprint("%s: storage @%.8luX, aperture @%8.ullX, ovl buf @%.8ulX\n",
scr->dev->name, scr->storage, scr->paddr,
mach64overlay);
}

4
sys/src/9/pc/vgamga2164w.c
View file

@ -40,6 +40,10 @@ mga2164wenable(VGAscr* scr)
if(p == nil || p->vid != MATROX)
return;
if((p->mem[0].bar & 1) != 0
|| (p->mem[1].bar & 1) != 0)
return;
if(p->did == MGA2064){
scr->mmio = vmap(p->mem[0].bar&~0x0F, p->mem[0].size);
if(scr->mmio == nil)

15
sys/src/9/pc/vgamga4xx.c
View file

@ -119,17 +119,22 @@ mga4xxenable(VGAscr* scr)
if(pci == nil)
return;
/* need to map frame buffer here too, so vga can find memory size */
if(pci->did == MGA4xx || pci->did == MGA550)
size = 32*MB;
else
size = 8*MB;
if((pci->mem[0].bar & 1) != 0 || pci->mem[0].size < size
|| (pci->mem[1].bar & 1) != 0 || pci->mem[1].size < 16*1024)
return;
scr->mmio = vmap(pci->mem[1].bar&~0x0F, 16*1024);
if(scr->mmio == nil)
return;
addvgaseg("mga4xxmmio", pci->mem[1].bar&~0x0F, pci->mem[1].size);
/* need to map frame buffer here too, so vga can find memory size */
if(pci->did == MGA4xx || pci->did == MGA550)
size = 32*MB;
else
size = 8*MB;
vgalinearaddr(scr, pci->mem[0].bar&~0x0F, size);
if(scr->paddr){

30
sys/src/9/pc/vganeomagic.c
View file

@ -26,8 +26,8 @@ static void
neomagicenable(VGAscr* scr)
{
Pcidev *p;
int curoff, vmsize;
ulong ioaddr;
int bar, curoff, vmsize;
uvlong ioaddr;
ulong iosize;
/*
@ -42,48 +42,46 @@ neomagicenable(VGAscr* scr)
p = scr->pci;
if(p == nil || p->vid != 0x10C8)
return;
bar = 1;
switch(p->did){
case 0x0003: /* MagicGraph 128ZV */
bar = 0;
if(p->mem[bar].bar & 1)
return;
ioaddr = (p->mem[bar].bar & ~0x0F) + 0x200000;
iosize = 0x200000;
curoff = 0x100;
vmsize = 1152*1024;
ioaddr = (p->mem[0].bar & ~0x0F) + 0x200000;
iosize = 0x200000;
break;
goto Map;
case 0x0083: /* MagicGraph 128ZV+ */
curoff = 0x100;
vmsize = 1152*1024;
ioaddr = p->mem[1].bar & ~0x0F;
iosize = p->mem[1].size;
break;
case 0x0004: /* MagicGraph 128XD */
curoff = 0x100;
vmsize = 2048*1024;
ioaddr = p->mem[1].bar & ~0x0F;
iosize = p->mem[1].size;
break;
case 0x0005: /* MagicMedia 256AV */
curoff = 0x1000;
vmsize = 2560*1024;
ioaddr = p->mem[1].bar & ~0x0F;
iosize = p->mem[1].size;
break;
case 0x0006: /* MagicMedia 256ZX */
curoff = 0x1000;
vmsize = 4096*1024;
ioaddr = p->mem[1].bar & ~0x0F;
iosize = p->mem[1].size;
break;
case 0x0016: /* MagicMedia 256XL+ */
curoff = 0x1000;
/* Vaio VESA BIOS says 6080, but then hwgc doesn't work */
vmsize = 4096*1024;
ioaddr = p->mem[1].bar & ~0x0F;
iosize = p->mem[1].size;
break;
default:
return;
}
if(p->mem[bar].bar & 1)
return;
ioaddr = p->mem[bar].bar & ~0x0F;
iosize = p->mem[bar].size;
Map:
scr->mmio = vmap(ioaddr, iosize);
if(scr->mmio == nil)
return;

3
sys/src/9/pc/vganvidia.c
View file

@ -90,7 +90,8 @@ nvidiaenable(VGAscr* scr)
if(p == nil)
return;
scr->id = p->did;
if(p->mem[0].bar & 1)
return;
scr->mmio = vmap(p->mem[0].bar & ~0x0F, p->mem[0].size);
if(scr->mmio == nil)
return;

5
sys/src/9/pc/vgaradeon.c
View file

@ -87,9 +87,10 @@ radeonenable(VGAscr *scr)
if (p == nil)
return;
scr->id = p->did;
if(p->mem[2].bar & 1)
return;
scr->mmio = vmap(p->mem[2].bar & ~0x0f, p->mem[2].size);
if(scr->mmio == 0)
if(scr->mmio == nil)
return;
addvgaseg("radeonmmio", p->mem[2].bar & ~0x0f, p->mem[2].size);

3
sys/src/9/pc/vgas3.c
View file

@ -91,8 +91,9 @@ s3page(VGAscr* scr, int page)
static void
s3linear(VGAscr* scr, int, int)
{
uvlong mmiobase;
ulong mmiosize;
int id, j;
ulong mmiobase, mmiosize;
Pcidev *p;
p = scr->pci;

3
sys/src/9/pc/vgat2r4.c
View file

@ -67,7 +67,8 @@ t2r4enable(VGAscr* scr)
p = scr->pci;
if(p == nil)
return;
if(p->mem[4].bar & 1)
return;
mmio = vmap(p->mem[4].bar & ~0x0F, p->mem[4].size);
if(mmio == nil)
return;

4
sys/src/9/pc/vgavesa.c
View file

@ -161,9 +161,9 @@ vesalinear(VGAscr *scr, int, int)
if(pci->ccrb != Pcibcdisp)
continue;
for(i=0; i<nelem(pci->mem); i++){
ulong a, e;
uvlong a, e;
if(pci->mem[i].bar&1) /* not memory */
if(pci->mem[i].size == 0 || (pci->mem[i].bar & 1) != 0)
continue;
a = pci->mem[i].bar & ~0xF;
e = a + pci->mem[i].size;

11
sys/src/9/pc/vgavmware.c
View file

@ -95,7 +95,7 @@ enum {
typedef struct Vmware Vmware;
struct Vmware {
ulong fb;
uvlong fb;
ulong ra;
ulong rd;
@ -142,6 +142,8 @@ vmwarelinear(VGAscr* scr, int, int)
p = scr->pci;
if(p == nil || p->vid != PCIVMWARE)
return;
if(p->mem[1].bar & 1)
return;
switch(p->did){
default:
return;
@ -151,6 +153,8 @@ vmwarelinear(VGAscr* scr, int, int)
vm->rd = 0x4560 + 4;
break;
case VMWARE2:
if((p->mem[0].bar & 1) == 0)
return;
vm->ver = 2;
vm->ra = p->mem[0].bar & ~3;
vm->rd = vm->ra + 1;
@ -164,8 +168,11 @@ vmwarelinear(VGAscr* scr, int, int)
addvgaseg("vmwarescreen", scr->paddr, scr->apsize);
if(scr->mmio==nil){
ulong mmiobase, mmiosize;
uvlong mmiobase;
ulong mmiosize;
if(p->mem[2].bar & 1)
return;
// mmiobase = vmrd(vm, Rmemstart);
mmiobase = p->mem[2].bar & ~0xF;
if(mmiobase == 0)

4
sys/src/9/pc/wavelan.c
View file

@ -1245,8 +1245,8 @@ wavelanreset(Ether* ether, Ctlr *ctlr)
intrenable(ether->irq, w_interrupt, ether, ether->tbdf, ether->name);
DEBUG("#l%d: irq %d port %lx type %s",
ether->ctlrno, ether->irq, ether->port, ether->type);
DEBUG("#l%d: irq %d port %llux type %s",
ether->ctlrno, ether->irq, (uvlong)ether->port, ether->type);
DEBUG(" %2.2ux%2.2ux%2.2ux%2.2ux%2.2ux%2.2ux\n",
ether->ea[0], ether->ea[1], ether->ea[2],
ether->ea[3], ether->ea[4], ether->ea[5]);

2
sys/src/9/pc64/dat.h
View file

@ -319,7 +319,7 @@ enum { /* MSRs */
struct ISAConf {
char *type;
ulong port;
uvlong port;
int irq;
ulong dma;
ulong mem;

8
sys/src/9/pc64/fns.h
View file

@ -125,7 +125,7 @@ void outsl(int, void*, int);
uintptr paddr(void*);
void patwc(void*, int);
ulong pcibarsize(Pcidev*, int);
void pcibussize(Pcidev*, ulong*, ulong*);
void pcibussize(Pcidev*, uvlong*, ulong*);
int pcicfgr8(Pcidev*, int);
int pcicfgr16(Pcidev*, int);
int pcicfgr32(Pcidev*, int);
@ -191,12 +191,12 @@ int tas(void*);
uvlong tscticks(uvlong*);
ulong umballoc(ulong, ulong, ulong);
void umbfree(ulong, ulong);
ulong upaalloc(ulong, ulong, ulong);
void upafree(ulong, ulong);
uvlong upaalloc(uvlong, ulong, ulong);
void upafree(uvlong, ulong);
void vectortable(void);
void vmxprocrestore(Proc *);
void vmxshutdown(void);
void* vmap(uintptr, int);
void* vmap(uvlong, int);
void vunmap(void*, int);
void wbinvd(void);
void writeconf(void);

9
sys/src/9/pc64/mmu.c
View file

@ -579,14 +579,17 @@ kunmap(KMap *k)
* synchronization is being done.
*/
void*
vmap(uintptr pa, int size)
vmap(uvlong pa, int size)
{
uintptr va;
int o;
if(pa+size > VMAPSIZE)
return 0;
if(pa < BY2PG || size <= 0 || -pa < size || pa+size > VMAPSIZE){
print("vmap pa=%llux size=%d pc=%#p\n", pa, size, getcallerpc(&pa));
return nil;
}
va = pa+VMAP;
/*
* might be asking for less than a page.
*/

4
sys/src/9/port/devether.c
View file

@ -415,8 +415,8 @@ Nope:
}
ether->type = cards[cardno].type;
print("#l%d: %s: %dMbps port 0x%luX irq %d ea %E\n",
ctlrno, ether->type, ether->mbps, ether->port, ether->irq, ether->ea);
print("#l%d: %s: %dMbps port 0x%lluX irq %d ea %E\n",
ctlrno, ether->type, ether->mbps, (uvlong)ether->port, ether->irq, ether->ea);
/* compute log10(ether->mbps) into lg */
for(lg = 0, mb = ether->mbps; mb >= 10; lg++)

2
sys/src/9/port/devpnp.c
View file

@ -544,7 +544,7 @@ pnpread(Chan *c, void *va, long n, vlong offset)
for(i=0; i<nelem(p->mem); i++){
if(p->mem[i].size == 0)
continue;
w = seprint(w, ebuf, " %d:%.8lux %d", i, p->mem[i].bar, p->mem[i].size);
w = seprint(w, ebuf, " %d:%.8llux %d", i, (uvlong)p->mem[i].bar, p->mem[i].size);
}
*w++ = '\n';
*w = '\0';

4
sys/src/9/port/devusb.c
View file

@ -716,8 +716,8 @@ hciprobe(int cardno, int ctlrno)
* modern machines have too many usb controllers to list on
* the console.
*/
dprint("#u/usb/ep%d.0: %s: port 0x%luX irq %d\n",
epnb, hcitypes[cardno].type, hp->port, hp->irq);
dprint("#u/usb/ep%d.0: %s: port 0x%lluX irq %d\n",
epnb, hcitypes[cardno].type, (uvlong)hp->port, hp->irq);
epnb++;
return hp;
}

8
sys/src/9/port/usbxhci.c
View file

@ -254,7 +254,7 @@ struct Ctlr
Rendez recover;
void *active;
uintptr base;
uvlong base;
};
struct Epio
@ -1697,7 +1697,7 @@ scanpci(void)
{
static int already = 0;
int i;
uintptr io;
uvlong io;
Ctlr *ctlr;
Pcidev *p;
u32int *mmio;
@ -1712,10 +1712,12 @@ scanpci(void)
*/
if(p->ccrb != Pcibcserial || p->ccru != Pciscusb || p->ccrp != 0x30)
continue;
if(p->mem[0].bar & 1)
continue;
io = p->mem[0].bar & ~0x0f;
if(io == 0)
continue;
print("usbxhci: %#x %#x: port %#p size %#x irq %d\n",
print("usbxhci: %#x %#x: port %llux size %d irq %d\n",
p->vid, p->did, io, p->mem[0].size, p->intl);
mmio = vmap(io, p->mem[0].size);
if(mmio == nil){

3
sys/src/cmd/aux/vga/3dfx.c
View file

@ -81,7 +81,8 @@ snarf(Vga* vga, Ctlr* ctlr)
vga->n[1] = 256;
vga->p[1] = 4;
if((v = (tdfx->pci->mem[2].bar & ~0x3)) == 0)
v = tdfx->pci->mem[2].bar & ~0x3;
if(v == 0)
error("%s: I/O not mapped\n", ctlr->name);
tdfx->io = v;

4
sys/src/cmd/aux/vga/i81x.c
View file

@ -403,10 +403,10 @@ dump(Vga* vga, Ctlr* ctlr)
p = i81x->pci;
printitem(name, "mem[0]");
Bprint(&stdout, "base %lux size %d\n", p->mem[0].bar & ~0x0F, p->mem[0].size);
Bprint(&stdout, "base %llux size %d\n", p->mem[0].bar & ~0x0F, p->mem[0].size);
printitem(name, "mem[1]");
Bprint(&stdout, "base %lux size %d\n", p->mem[1].bar & ~0x0F, p->mem[1].size);
Bprint(&stdout, "base %llux size %d\n", p->mem[1].bar & ~0x0F, p->mem[1].size);
}

3
sys/src/cmd/aux/vga/mach64xx.c
View file

@ -379,7 +379,8 @@ snarf(Vga* vga, Ctlr* ctlr)
mp->iow32 = portiow32;
mp->pci = pcimatch(0, 0x1002, 0);
if (mp->pci) {
if(v = mp->pci->mem[1].bar & ~0x3) {
v = mp->pci->mem[1].bar & ~0x3;
if(v != 0) {
mp->io = v;
mp->ior32 = pciior32;
mp->iow32 = pciiow32;

4
sys/src/cmd/aux/vga/main.c
View file

@ -131,12 +131,12 @@ linear(Vga* vga)
* new: addr p 0x12345678 v 0x82345678 size 0x123
*/
if(buf[0]=='p' && buf[1]==' '){
vga->vmb = strtoul(buf+2, 0, 0);
vga->vmb = strtoull(buf+2, 0, 0);
p = strstr(buf, "size");
if(p)
vga->apz = strtoul(p+4, 0, 0);
}else
vga->vmb = strtoul(buf, 0, 0);
vga->vmb = strtoull(buf, 0, 0);
}
else
vgactlw("linear", "0");

4
sys/src/cmd/aux/vga/pci.c
View file

@ -70,9 +70,9 @@ pcicfginit(void)
j = strtol(s+1, &s, 10);
if(j < 0 || j >= nelem(p->mem))
break;
p->mem[j].bar = strtoul(s+1, &s, 16);
p->mem[j].bar = strtoull(s+1, &s, 16);
p->mem[j].size = strtoul(s+1, &s, 10);
trace("\tmem[%d] = %lux %d\n", j, p->mem[j].bar, p->mem[j].size);
trace("\tmem[%d] = %llux %d\n", j, p->mem[j].bar, p->mem[j].size);
}
if(pcilist != nil)

2
sys/src/cmd/aux/vga/pci.h
View file

@ -92,7 +92,7 @@ typedef struct Pcidev {
uchar rid; /* revision ID */
struct {
ulong bar; /* base address */
uvlong bar; /* base address */
int size;
} mem[6];

2
sys/src/cmd/aux/vga/vga.c
View file

@ -459,7 +459,7 @@ dump(Vga* vga, Ctlr* ctlr)
if(vga->vma || vga->vmb){
printitem(ctlr->name, "vm a b");
Bprint(&stdout, "%9lud %8lud\n", vga->vma, vga->vmb);
Bprint(&stdout, "%9lud %8llud\n", vga->vma, vga->vmb);
}
if(vga->vmz){
printitem(ctlr->name, "vmz");

2
sys/src/cmd/aux/vga/vga.h
View file

@ -197,7 +197,7 @@ typedef struct Vga {
ulong r[2];
ulong vma; /* video memory linear-address alignment */
ulong vmb; /* video memory linear-address base */
uvlong vmb; /* video memory linear-address base */
ulong apz; /* aperture size */
ulong vmz; /* video memory size */