add aux/icanhasvmx
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aiju
parent
3844090f39
commit
1a40bdeb84
302
sys/src/cmd/aux/icanhasvmx.c
Normal file
302
sys/src/cmd/aux/icanhasvmx.c
Normal file
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@ -0,0 +1,302 @@
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#include <u.h>
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#include <libc.h>
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#include <bio.h>
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Biobuf *out;
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enum {
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VMX_BASIC_MSR = 0x480,
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VMX_PINB_CTLS_MSR = 0x481,
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VMX_PROCB_CTLS_MSR = 0x482,
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VMX_VMEXIT_CTLS_MSR = 0x483,
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VMX_VMENTRY_CTLS_MSR = 0x484,
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VMX_MISC_MSR = 0x485,
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VMX_CR0_FIXED0 = 0x486,
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VMX_CR0_FIXED1 = 0x487,
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VMX_CR4_FIXED0 = 0x488,
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VMX_CR4_FIXED1 = 0x489,
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VMX_VMCS_ENUM = 0x48A,
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VMX_PROCB_CTLS2_MSR = 0x48B,
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VMX_VPIDEPT_MSR = 0x48C,
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VMX_TRUE_PINB_CTLS_MSR = 0x48D,
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VMX_TRUE_PROCB_CTLS_MSR = 0x48E,
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VMX_TRUE_EXIT_CTLS_MSR = 0x48F,
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VMX_TRUE_ENTRY_CTLS_MSR = 0x490,
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VMX_VMFUNC_MSR = 0x491,
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PROCB_IRQWIN = 1<<2,
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PROCB_EXITHLT = 1<<7,
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PROCB_EXITINVLPG = 1<<9,
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PROCB_EXITMWAIT = 1<<10,
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PROCB_EXITRDPMC = 1<<11,
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PROCB_EXITRDTSC = 1<<12,
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PROCB_EXITCR3LD = 1<<15,
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PROCB_EXITCR3ST = 1<<16,
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PROCB_EXITCR8LD = 1<<19,
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PROCB_EXITCR8ST = 1<<20,
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PROCB_EXITMOVDR = 1<<23,
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PROCB_EXITIO = 1<<24,
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PROCB_MONTRAP = 1<<27,
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PROCB_EXITMONITOR = 1<<29,
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PROCB_EXITPAUSE = 1<<30,
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PROCB_USECTLS2 = 1<<31,
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PROCB_EPT = 1<<1,
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PROCB_EXITGDT = 1<<2,
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PROCB_VPID = 1<<5,
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PROCB_UNRESTR = 1<<7,
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};
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int
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cpuidcheck(void)
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{
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int pfd[2];
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Biobuf *bp;
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char *l, *f[64];
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int i, rc;
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pipe(pfd);
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switch(rfork(RFPROC|RFFDG)){
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case 0:
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close(pfd[1]);
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close(0);
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open("/dev/null", OREAD);
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dup(pfd[0], 1);
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execl("/bin/aux/cpuid", "cpuid", nil);
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sysfatal("execl: %r");
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break;
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case -1: sysfatal("rfork: %r");
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}
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close(pfd[0]);
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bp = Bfdopen(pfd[1], OREAD);
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if(bp == nil) sysfatal("Bfdopen: %r");
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for(; l = Brdstr(bp, '\n', 10), l != nil; free(l)){
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rc = tokenize(l, f, nelem(f));
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if(rc < 1) continue;
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if(strcmp(f[0], "features") != 0) continue;
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for(i = 1; i < rc; i++)
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if(strcmp(f[i], "vmx") == 0){
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Bterm(bp);
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close(pfd[1]);
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waitpid();
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return 0;
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}
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}
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Bterm(bp);
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close(pfd[1]);
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waitpid();
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return -1;
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}
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static int msrfd;
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u64int
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rdmsr(u32int addr)
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{
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u64int rv;
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if(pread(msrfd, &rv, 8, addr) < 0) sysfatal("pread: %r");
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return rv;
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}
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void
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wrmsr(u32int addr, u64int val)
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{
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if(pwrite(msrfd, &val, 8, addr) < 0) sysfatal("pwrite: %r");
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}
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static char *pinbits[64] = {
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[0] "extirq", [3] "nmiexit", [5] "virtnmi", [6] "preempt", [7] "procpostirq"
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};
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static char *procbits[64] = {
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[2] "irqwin", [3] "tscoffset", [7] "hltexit", [9] "invlpgexit", [10] "mwaitexit",
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[11] "rdpmcexit", [12] "rdtscexit", [15] "cr3ldexit", [16] "cr3stexit", [19] "cr8ldexit",
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[20] "cr8stexit", [21] "tprshadow", [22] "nmiwin", [23] "movdrexit", [24] "ioexit",
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[25] "iobitmap", [27] "mtf", [28] "msrbitmap", [29] "monitorexit", [30] "pauseexit",
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};
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static char *proc2bits[64] = {
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[0] "virtapic", [1] "ept", [2] "gdtexit", [3] "rdtscp", [4] "virtx2apic", [5] "vpid",
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[6] "wbinvdexit", [7] "unrestr", [8] "apicregs", [9] "virtirq", [10] "pauseloopexit",
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[11] "rdrandexit", [12] "invpcid", [13] "vmfunc", [14] "vmcsshadow", [15] "enclsexit",
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[16] "rdseedexit", [17] "pml", [18] "#ve", [19] "conceal", [20] "xsave", [22] "eptxmode",
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[25] "tscscale",
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};
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static char *exitbits[64] = {
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[2] "savedebug", [9] "host64", [12] "saveperfglobal", [15] "ackextirq",
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[16] "savepat", [17] "loadpat", [20] "saveefer", [21] "loadefer", [22] "savepreempt",
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[23] "savebndcfgs", [24] "concealexits",
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};
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static char *entrybits[64] = {
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[2] "loaddebug", [9] "guest64", [10] "entrysmm", [11] "dualmonitor", [13] "loadperfglobal",
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[14] "loadpat", [15] "loadefer", [16] "loadbndcfgs", [17] "concealentries",
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};
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static char *miscbits[64] = {
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[5] "longmodeswitch", [6] "hlt", [7] "shutdown", [8] "ipi", [14] "pt", [15] "rdmsrsmm",
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[28] "smmblock", [29] "vmwriteany", [30] "zerolenswirq",
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};
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static char *cr0bits[64] = {
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[0] "pe", [1] "mp", [2] "em", [3] "ts", [4] "et", [5] "ne", [6] "wp", [18] "am",
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[29] "nw", [30] "cd", [31] "pg",
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};
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static char *cr4bits[64] = {
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[0] "vme", [1] "pvi", [2] "tsd", [3] "de", [4] "pse", [5] "pae", [6] "mce", [7] "pge",
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[8] "pce", [9] "osxfsr", [10] "osxmmxcpt", [11] "umip", [13] "vmxe", [14] "smxe",
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[16] "fsgsbase", [17] "pcide", [18] "osxsave", [20] "smep", [21] "smap", [22] "pke"
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};
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static char *eptbits[64] = {
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[0] "xonly", [6] "pwl4", [8] "ucmem", [14] "wbmem", [16] "2MBpage", [17] "1GBpage",
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[20] "invept", [21] "dirtybits", [22] "violexitinfo", [25] "invept.single", [26] "invept.all",
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};
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static char *vpidbits[64] = {
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[32] "invvpid", [40] "invvpid.addr", [41] "invvpid.single", [42] "invvpid.all", [43] "invvpid.noglob",
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};
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void
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printbits(char *id, uvlong allowed, uvlong forced, char **s)
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{
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int i, l;
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l = -1;
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for(i = 0; i < 64; i++){
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if(s[i] == nil) continue;
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if(((allowed|forced) & 1ULL<<i) == 0) continue;
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if((uint)l > 80){
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if(l >= 0)
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Bprint(out, "\n");
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l = Bprint(out, "%s ", id);
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}
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if((forced & 1ULL<<i) != 0) l += Bprint(out, "!");
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l += Bprint(out, "%s ", s[i]);
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}
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if(l >= 0)
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Bprint(out, "\n");
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}
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void
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printbits32(char *id, uvlong w, char **s)
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{
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printbits(id, (u32int)(w >> 32), (u32int)w, s);
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}
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u64int
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rawprint(char *s, int addr)
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{
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u64int msr;
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msr = rdmsr(addr);
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Bprint(out, "%s %#.16ullx\n", s, msr);
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return msr;
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}
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void
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main(int argc, char **argv)
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{
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u64int msr, msr2;
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int ext;
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static int no, raw;
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ARGBEGIN {
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case 'r': raw++; break;
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default: goto usage;
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} ARGEND;
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if(argc != 0){
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usage:
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fprint(2, "usage: %s [-r]\n", argv0);
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exits("usage");
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}
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out = Bfdopen(1, OWRITE);
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if(out == nil) sysfatal("Bfdopen: %r");
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msrfd = open("#P/msr", OREAD);
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if(msrfd < 0) sysfatal("open: %r");
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if(cpuidcheck() < 0) sysfatal("CPU does not support VMX");
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msr = rdmsr(0x3a);
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if((msr & 5) == 0) wrmsr(0x3a, msr | 5);
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if((rdmsr(0x3a) & 5) != 5){
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fprint(2, "VMX disabled by BIOS");
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no++;
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}
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msr = rdmsr(VMX_PROCB_CTLS_MSR);
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if((vlong)msr >= 0){
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fprint(2, "no secondary controls");
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no++;
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}else{
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msr = rdmsr(VMX_PROCB_CTLS2_MSR);
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if((msr >> 32 & PROCB_EPT) == 0){
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fprint(2, "no EPT support");
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no++;
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}
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if((msr >> 32 & PROCB_VPID) == 0){
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fprint(2, "no VPID support");
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no++;
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}
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}
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if(no == 0)
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fprint(2, "VMX is supported\n");
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if(!raw){
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msr = rdmsr(VMX_BASIC_MSR);
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Bprint(out, "vmcsrev %#ux\n", (u32int)msr & 0x7fffffff);
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Bprint(out, "vmxonsz %d\n", (u32int)(msr >> 32) & 0x1fff);
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Bprint(out, "vmcsmem %d\n", (u32int)(msr >> 50) & 15);
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ext = (u32int)(msr >> 55) & 1;
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Bprint(out, "extcontrols %d\n", ext);
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msr = rdmsr(ext ? VMX_TRUE_PINB_CTLS_MSR : VMX_PINB_CTLS_MSR);
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printbits32("pin", msr, pinbits);
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msr = rdmsr(ext ? VMX_TRUE_PROCB_CTLS_MSR : VMX_PROCB_CTLS_MSR);
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printbits32("proc", msr, procbits);
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if((msr & 1ULL<<63) != 0){
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msr = rdmsr(VMX_PROCB_CTLS2_MSR);
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printbits32("proc2", msr, proc2bits);
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}
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msr = rdmsr(ext ? VMX_TRUE_ENTRY_CTLS_MSR : VMX_VMENTRY_CTLS_MSR);
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printbits32("entry", msr, entrybits);
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msr = rdmsr(ext ? VMX_TRUE_EXIT_CTLS_MSR : VMX_VMEXIT_CTLS_MSR);
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printbits32("exit", msr, exitbits);
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msr = rdmsr(VMX_MISC_MSR);
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Bprint(out, "misc preemptdiv:%d cr3targ:%d maxmsr:%d mseg:%#ux\n", (int)msr & 0x1f, (int)msr >> 16 & 0x1ff, (int)msr >> 25 & 7, (int)(msr >> 32));
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printbits("misc", msr, 0, miscbits);
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msr = rdmsr(VMX_CR0_FIXED0);
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msr2 = rdmsr(VMX_CR0_FIXED1);
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printbits("cr0fixed", msr & msr2, ~msr & ~msr2, cr0bits);
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msr = rdmsr(VMX_CR4_FIXED0);
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msr2 = rdmsr(VMX_CR4_FIXED1);
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printbits("cr4fixed", msr & msr2, ~msr & ~msr2, cr4bits);
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Bprint(out, "vmcsenum %#ullx\n", rdmsr(VMX_VMCS_ENUM));
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if(no == 0){
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msr = rdmsr(VMX_VPIDEPT_MSR);
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printbits("ept", msr, 0, eptbits);
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printbits("vpid", msr, 0, vpidbits);
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}
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}else{
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msr = rawprint("basic", VMX_BASIC_MSR);
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ext = (u32int)(msr >> 55) & 1;
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rawprint("pin", ext ? VMX_TRUE_PINB_CTLS_MSR : VMX_PINB_CTLS_MSR);
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msr = rawprint("proc", ext ? VMX_TRUE_PROCB_CTLS_MSR : VMX_PROCB_CTLS_MSR);
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if((msr & 1ULL<<63) != 0)
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rawprint("proc2", VMX_PROCB_CTLS2_MSR);
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rawprint("entry", ext ? VMX_TRUE_ENTRY_CTLS_MSR : VMX_VMENTRY_CTLS_MSR);
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rawprint("exit", ext ? VMX_TRUE_EXIT_CTLS_MSR : VMX_VMEXIT_CTLS_MSR);
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rawprint("misc", VMX_MISC_MSR);
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rawprint("cr0fixed0", VMX_CR0_FIXED0);
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rawprint("cr0fixed1", VMX_CR0_FIXED1);
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rawprint("cr4fixed0", VMX_CR4_FIXED0);
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rawprint("cr4fixed1", VMX_CR4_FIXED1);
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rawprint("vmcsenum", VMX_VMCS_ENUM);
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if(no == 0)
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rawprint("vpidept", VMX_VPIDEPT_MSR);
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}
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Bterm(out);
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exits(nil);
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}
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@ -20,6 +20,7 @@ TARG=\
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esd\
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getflags\
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icanhasmsi\
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icanhasvmx\
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lines\
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listen\
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listen1\
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