igfx: fix cdclk and dpll settings for dual channel lvds on sandybridge
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parent
c6359c3090
commit
174d7e52a3
1 changed files with 5 additions and 1 deletions
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@ -456,7 +456,7 @@ snarf(Vga* vga, Ctlr* ctlr)
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case TypeSNB:
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case TypeSNB:
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igfx->npipe = 2; /* A,B */
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igfx->npipe = 2; /* A,B */
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igfx->cdclk = 300; /* MHz */
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igfx->cdclk = 400; /* MHz */
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goto IVBcommon;
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goto IVBcommon;
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case TypeIVB:
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case TypeIVB:
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@ -843,6 +843,10 @@ initdpll(Igfx *igfx, int x, int freq, int port)
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dpll->ctrl.v &= ~(3<<24);
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dpll->ctrl.v &= ~(3<<24);
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if(port == PortLCD){
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if(port == PortLCD){
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p2 = 14;
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p2 = 14;
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if(freq > 112*MHz){
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p2 >>= 1;
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dpll->ctrl.v |= (1<<24);
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}
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if(genpll(freq, cref, p2, &m1, &m2, &n, &p1) < 0)
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if(genpll(freq, cref, p2, &m1, &m2, &n, &p1) < 0)
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return -1;
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return -1;
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} else {
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} else {
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