igfx: fix cdclk and dpll settings for dual channel lvds on sandybridge

This commit is contained in:
qwx 2017-08-23 00:25:39 +03:00
parent c6359c3090
commit 174d7e52a3

View file

@ -456,7 +456,7 @@ snarf(Vga* vga, Ctlr* ctlr)
case TypeSNB:
igfx->npipe = 2; /* A,B */
igfx->cdclk = 300; /* MHz */
igfx->cdclk = 400; /* MHz */
goto IVBcommon;
case TypeIVB:
@ -843,6 +843,10 @@ initdpll(Igfx *igfx, int x, int freq, int port)
dpll->ctrl.v &= ~(3<<24);
if(port == PortLCD){
p2 = 14;
if(freq > 112*MHz){
p2 >>= 1;
dpll->ctrl.v |= (1<<24);
}
if(genpll(freq, cref, p2, &m1, &m2, &n, &p1) < 0)
return -1;
} else {