From 15b903c4e187b82d6dd01b8284b244945522c06d Mon Sep 17 00:00:00 2001 From: cinap_lenrek Date: Wed, 12 May 2021 22:40:51 +0200 Subject: [PATCH] pc64: avoid getcr3() in mmuflushtlb() it turns out that calculating physical address of pml4 is faster than reading the machine register, so pass it explicitely. --- sys/src/9/pc64/fns.h | 2 +- sys/src/9/pc64/main.c | 4 ++-- sys/src/9/pc64/mmu.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/sys/src/9/pc64/fns.h b/sys/src/9/pc64/fns.h index 01a1959d3..75764f06d 100644 --- a/sys/src/9/pc64/fns.h +++ b/sys/src/9/pc64/fns.h @@ -96,7 +96,7 @@ void meminit(void); void meminit0(void); void memreserve(uintptr, uintptr); void mfence(void); -#define mmuflushtlb() putcr3(getcr3()) +#define mmuflushtlb(pml4) putcr3(pml4) void mmuinit(void); uintptr *mmuwalk(uintptr*, uintptr, int, int); char* mtrr(uvlong, uvlong, char *); diff --git a/sys/src/9/pc64/main.c b/sys/src/9/pc64/main.c index 17a766137..78cd8ef4c 100644 --- a/sys/src/9/pc64/main.c +++ b/sys/src/9/pc64/main.c @@ -239,7 +239,7 @@ rebootjump(uintptr entry, uintptr code, ulong size) if((pte = mmuwalk(m->pml4, REBOOTADDR, 0, 0)) != nil) *pte &= ~PTENOEXEC; - mmuflushtlb(); + mmuflushtlb(PADDR(m->pml4)); /* setup reboot trampoline function */ f = (void*)REBOOTADDR; @@ -350,5 +350,5 @@ procsave(Proc *p) * You might think it would be a win not to do this in that case, * especially on VMware, but it turns out not to matter. */ - mmuflushtlb(); + mmuflushtlb(PADDR(m->pml4)); } diff --git a/sys/src/9/pc64/mmu.c b/sys/src/9/pc64/mmu.c index 23a39f6d8..1f6560bfe 100644 --- a/sys/src/9/pc64/mmu.c +++ b/sys/src/9/pc64/mmu.c @@ -67,7 +67,7 @@ taskswitch(uintptr stack) tss->rsp1[1] = stack >> 32; tss->rsp2[0] = (u32int)stack; tss->rsp2[1] = stack >> 32; - mmuflushtlb(); + mmuflushtlb(PADDR(m->pml4)); } static void kernelro(void);