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igfx: fix some typos in comments

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This commit is contained in:
Michael Forney 2022-03-05 01:06:20 +00:00
parent d52f25ecdc
commit 0f890140f2
1 changed files with 4 additions and 4 deletions
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8
sys/src/cmd/aux/vga/igfx.c
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@ -65,7 +65,7 @@ struct Trans {
Reg vss; /* pipe/trans VSYNCSHIFT_x */ Reg vss; /* pipe/trans VSYNCSHIFT_x */
Reg conf; /* pipe/trans CONF_x */ Reg conf; /* pipe/trans CONF_x */
Reg chicken; /* workarround register */ Reg chicken; /* workaround register */
Reg dpctl; /* TRANS_DP_CTL_x */ Reg dpctl; /* TRANS_DP_CTL_x */
@ -962,7 +962,7 @@ inittrans(Trans *t, Mode *m)
/* clear all but 27:28 frame start delay (initialized by bios) */ /* clear all but 27:28 frame start delay (initialized by bios) */
t->conf.v &= 3<<27; t->conf.v &= 3<<27;
/* tans/pipe enable */ /* trans/pipe enable */
t->conf.v |= 1<<31; t->conf.v |= 1<<31;
/* trans/pipe timing */ /* trans/pipe timing */
@ -1384,7 +1384,7 @@ loadtrans(Igfx *igfx, Trans *t)
sleep(10); sleep(10);
} }
/* workarround: set timing override bit */ /* workaround: set timing override bit */
csr(igfx, t->chicken.a, 0, 1<<31); csr(igfx, t->chicken.a, 0, 1<<31);
/* enable displayport transcoder */ /* enable displayport transcoder */
@ -1579,7 +1579,7 @@ disabletrans(Igfx *igfx, Trans *t)
if((rr(igfx, t->conf.a) & (1<<30)) == 0) if((rr(igfx, t->conf.a) & (1<<30)) == 0)
break; break;
} }
/* workarround: clear timing override bit */ /* workaround: clear timing override bit */
csr(igfx, t->chicken.a, 1<<31, 0); csr(igfx, t->chicken.a, 1<<31, 0);
/* disable dpll */ /* disable dpll */