diff --git a/sys/src/9/pc/archacpi.c b/sys/src/9/pc/archacpi.c
index 0b6e7ea48..f996d90df 100644
--- a/sys/src/9/pc/archacpi.c
+++ b/sys/src/9/pc/archacpi.c
@@ -645,11 +645,17 @@ readtbls(Chan*, void *v, long n, vlong o)
 static int
 identify(void)
 {
+	uintptr pa;
 	char *cp;
 
 	if((cp = getconf("*acpi")) == nil)
 		return 1;
-	if((rsd = sigsearch("RSD PTR ")) == nil)
+	pa = (uintptr)strtoull(cp, nil, 16);
+	if(pa <= 1)
+		rsd = sigsearch("RSD PTR ");
+	else
+		rsd = vmap(pa, sizeof(Rsd));
+	if(rsd == nil)
 		return 1;
 	if(checksum(rsd, 20) && checksum(rsd, 36))
 		return 1;
diff --git a/sys/src/9/pc/main.c b/sys/src/9/pc/main.c
index 637895575..2f2e9d04c 100644
--- a/sys/src/9/pc/main.c
+++ b/sys/src/9/pc/main.c
@@ -146,15 +146,15 @@ main(void)
 	cpuidentify();
 	meminit();
 	confinit();
-	archinit();
 	xinit();
+	archinit();
+	bootscreeninit();
 	if(i8237alloc != nil)
 		i8237alloc();
 	trapinit();
 	printinit();
 	cpuidprint();
 	mmuinit();
-	bootscreeninit();
 	if(arch->intrinit)	/* launches other processors on an mp */
 		arch->intrinit();
 	timersinit();
diff --git a/sys/src/9/pc/mmu.c b/sys/src/9/pc/mmu.c
index 3ed8229e4..6fbc323af 100644
--- a/sys/src/9/pc/mmu.c
+++ b/sys/src/9/pc/mmu.c
@@ -59,7 +59,6 @@ Segdesc gdt[NGDT] =
 [KESEG16]		EXEC16SEGM(0),	/* kernel code 16-bit */
 };
 
-static int didmmuinit;
 static void taskswitch(ulong, ulong);
 static void memglobal(void);
 
@@ -79,8 +78,6 @@ mmuinit(void)
 	ulong x, *p;
 	ushort ptr[3];
 
-	didmmuinit = 1;
-
 	if(0) print("vpt=%#.8ux vpd=%#p kmap=%#.8ux\n",
 		VPT, vpd, KMAP);
 
@@ -523,7 +520,7 @@ mmuwalk(ulong* pdb, ulong va, int level, int create)
 			 * memory.c if we haven't set up the xalloc
 			 * tables yet.
 			 */
-			if(didmmuinit)
+			if(conf.mem[0].npage != 0)
 				map = xspanalloc(BY2PG, BY2PG, 0);
 			else
 				map = rampage();
diff --git a/sys/src/9/pc64/main.c b/sys/src/9/pc64/main.c
index 63dce3934..14a786605 100644
--- a/sys/src/9/pc64/main.c
+++ b/sys/src/9/pc64/main.c
@@ -32,6 +32,7 @@ int idle_spin;
 uchar *sp;	/* user stack of init proc */
 
 extern void (*i8237alloc)(void);
+extern void bootscreeninit(void);
 
 static void
 multibootargs(void)
@@ -506,8 +507,9 @@ main()
 	cpuidentify();
 	meminit();
 	confinit();
-	archinit();
 	xinit();
+	archinit();
+	bootscreeninit();
 	if(i8237alloc != nil)
 		i8237alloc();
 	trapinit();
diff --git a/sys/src/9/pc64/memory.c b/sys/src/9/pc64/memory.c
index 1c7759dad..27e01de64 100644
--- a/sys/src/9/pc64/memory.c
+++ b/sys/src/9/pc64/memory.c
@@ -371,6 +371,34 @@ sigsearch(char* signature)
 	return sigscan(KADDR(0xe0000), 0x20000, signature);
 }
 
+static void
+lowraminit(void)
+{
+	uintptr pa, x;
+	uchar *bda;
+
+	/*
+	 * Initialise the memory bank information for conventional memory
+	 * (i.e. less than 640KB). The base is the first location after the
+	 * bootstrap processor MMU information and the limit is obtained from
+	 * the BIOS data area.
+	 */
+	x = PADDR(CPU0END);
+	bda = (uchar*)KADDR(0x400);
+	pa = ((bda[0x14]<<8)|bda[0x13])*KB;
+	if(x < pa){
+		mapfree(&rmapram, x, pa-x);
+		memset(KADDR(x), 0, pa-x);		/* keep us honest */
+	}
+
+	x = PADDR(PGROUND((uintptr)end));
+	pa = MemMin;
+	if(x > pa)
+		panic("kernel too big");
+	mapfree(&rmapram, x, pa-x);
+	memset(KADDR(x), 0, pa-x);		/* keep us honest */
+}
+
 typedef struct Emap Emap;
 struct Emap
 {
@@ -561,6 +589,7 @@ meminit(void)
 	uintptr lost;
 
 	umbscan();
+	lowraminit();
 	e820scan();
 
 	/*
diff --git a/sys/src/9/pc64/mmu.c b/sys/src/9/pc64/mmu.c
index f25d485e1..4d896ce4f 100644
--- a/sys/src/9/pc64/mmu.c
+++ b/sys/src/9/pc64/mmu.c
@@ -23,8 +23,6 @@ Segdesc gdt[NGDT] =
 [UESEG]		EXECSEGM(3),		/* user code */
 };
 
-static int didmmuinit = 0;
-
 static struct {
 	Lock;
 	MMU	*free;
@@ -79,8 +77,6 @@ mmuinit(void)
 	vlong v;
 	int i;
 
-	didmmuinit = 1;
-
 	/* zap double map done by l.s */ 
 	m->pml4[512] = 0;
 	m->pml4[0] = 0;
@@ -242,7 +238,7 @@ mmucreate(uintptr *table, uintptr va, int level, int index)
 			up->kmapcount++;
 		}
 		page = p->page;
-	} else if(didmmuinit) {
+	} else if(conf.mem[0].npage != 0) {
 		page = mallocalign(PTSZ, BY2PG, 0, 0);
 	} else {
 		page = rampage();