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pc, pc64: toggle bit 2 in port 0x61 to reset and enable PCI SERR# nmi's, print nmi status

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This commit is contained in:
cinap_lenrek 2015-06-28 18:22:36 +02:00
parent 9b0efa4176
commit 00328b5759
2 changed files with 6 additions and 4 deletions
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5
sys/src/9/pc/trap.c
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@ -175,7 +175,7 @@ nmienable(void)
outb(0x70, 0);
x = inb(0x61) & 0x07; /* Enable NMI */
outb(0x61, 0x08|x);
outb(0x61, 0x0C|x);
outb(0x61, x);
}
@ -422,7 +422,8 @@ trap(Ureg* ureg)
* Don't re-enable, it confuses the crash dumps.
nmienable();
*/
iprint("cpu%d: PC %#8.8lux\n", m->machno, ureg->pc);
iprint("cpu%d: nmi PC %#8.8lux, status %ux\n",
m->machno, ureg->pc, inb(0x61));
while(m->machno != 0)
;
}

5
sys/src/9/pc64/trap.c
View file

@ -175,7 +175,7 @@ nmienable(void)
outb(0x70, 0);
x = inb(0x61) & 0x07; /* Enable NMI */
outb(0x61, 0x08|x);
outb(0x61, 0x0C|x);
outb(0x61, x);
}
@ -416,7 +416,8 @@ trap(Ureg *ureg)
* Don't re-enable, it confuses the crash dumps.
nmienable();
*/
iprint("cpu%d: PC %#p\n", m->machno, ureg->pc);
iprint("cpu%d: nmi PC %#p, status %ux\n",
m->machno, ureg->pc, inb(0x61));
while(m->machno != 0)
;
}