plan9fox/sys/src/libc/arm64/memset.s

TEXT memset(SB), $-4
	MOVBU	c+8(FP), R1
	MOVWU	n+16(FP), R2

	ADD	R0, R2, R3
	BIC	$15, R2, R4
	CBZ	R4, _loop1
	ADD	R0, R4, R4

	ORR	R1<<8, R1
	ORR	R1<<16, R1
	ORR	R1<<32, R1

_loop16:
	MOVP	R1, R1, (R0)16!
	CMP	R4, R0
	BNE	_loop16

_loop1:
	CMP	R3, R0
	BEQ	_done

	MOVBU	R1, (R0)1!
	B	_loop1

_done:
	RETURN
libc: provide arm64 assembly versions for memmove() and memset() just a first approximation, uses unaligned 8 byte loads and stores. MOVP not yet implemented by the linker. no ZVA cache magic yet. 2019-05-09 00:32:09 +00:00			`TEXT memset(SB), $-4`
			`MOVBU c+8(FP), R1`
			`MOVWU n+16(FP), R2`

			`ADD R0, R2, R3`
libc: use MOVP instruction for arm64 memmove() and memset() 2019-05-09 09:40:54 +00:00			`BIC $15, R2, R4`
libc: provide arm64 assembly versions for memmove() and memset() just a first approximation, uses unaligned 8 byte loads and stores. MOVP not yet implemented by the linker. no ZVA cache magic yet. 2019-05-09 00:32:09 +00:00			`CBZ R4, _loop1`
			`ADD R0, R4, R4`

			`ORR R1<<8, R1`
			`ORR R1<<16, R1`
			`ORR R1<<32, R1`

libc: use MOVP instruction for arm64 memmove() and memset() 2019-05-09 09:40:54 +00:00			`_loop16:`
			`MOVP R1, R1, (R0)16!`
libc: provide arm64 assembly versions for memmove() and memset() just a first approximation, uses unaligned 8 byte loads and stores. MOVP not yet implemented by the linker. no ZVA cache magic yet. 2019-05-09 00:32:09 +00:00			`CMP R4, R0`
libc: use MOVP instruction for arm64 memmove() and memset() 2019-05-09 09:40:54 +00:00			`BNE _loop16`
libc: provide arm64 assembly versions for memmove() and memset() just a first approximation, uses unaligned 8 byte loads and stores. MOVP not yet implemented by the linker. no ZVA cache magic yet. 2019-05-09 00:32:09 +00:00
			`_loop1:`
			`CMP R3, R0`
			`BEQ _done`

			`MOVBU R1, (R0)1!`
			`B _loop1`

			`_done:`
			`RETURN`