2020-01-08 02:35:01 +00:00
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typedef struct Conf Conf;
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typedef struct Confmem Confmem;
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typedef struct FPsave FPsave;
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typedef struct PFPU PFPU;
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typedef struct L1 L1;
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typedef struct Label Label;
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typedef struct Lock Lock;
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typedef struct KMap KMap;
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typedef struct MMMU MMMU;
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typedef struct Mach Mach;
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typedef struct Page Page;
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typedef struct Proc Proc;
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typedef struct PMMU PMMU;
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typedef struct Ureg Ureg;
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typedef struct ISAConf ISAConf;
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2020-01-12 03:40:42 +00:00
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typedef struct DMAC DMAC;
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2020-01-08 02:35:01 +00:00
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typedef uvlong Tval;
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#pragma incomplete Ureg
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#define MAXSYSARG 5 /* for mount(fd, mpt, flag, arg, srv) */
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#define AOUT_MAGIC (E_MAGIC)
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struct Lock
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{
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ulong key;
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u32int sr;
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uintptr pc;
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Proc* p;
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Mach* m;
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int isilock;
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};
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struct Label
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{
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uintptr sp;
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uintptr pc;
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};
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struct FPsave
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{
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ulong exc, scr;
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uchar regs[256];
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};
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struct PFPU
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{
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int fpstate;
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FPsave fpsave[1];
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};
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enum
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{
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FPinit,
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FPactive,
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FPinactive,
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FPillegal = 0x100
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};
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struct Confmem
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{
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uintptr base;
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usize npage;
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uintptr kbase;
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uintptr klimit;
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};
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struct Conf
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{
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ulong nmach; /* processors */
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ulong nproc; /* processes */
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Confmem mem[2]; /* physical memory */
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ulong npage; /* total physical pages of memory */
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usize upages; /* user page pool */
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ulong copymode; /* 0 is copy on write, 1 is copy on reference */
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ulong ialloc; /* max interrupt time allocation in bytes */
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ulong pipeqsize; /* size in bytes of pipe queues */
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ulong nimage; /* number of page cache image headers */
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ulong nswap; /* number of swap pages */
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int nswppo; /* max # of pageouts per segment pass */
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int monitor;
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};
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/*
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* MMU stuff in proc
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*/
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#define NCOLOR 1
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struct PMMU
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{
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L1 *l1;
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Page *mmuused, *mmufree;
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int nkmap;
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Page *kmaptable;
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};
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#include "../port/portdat.h"
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struct L1
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{
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Ref;
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uintptr pa;
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ulong *va;
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L1 *next;
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};
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struct MMMU
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{
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L1 l1;
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L1 *l1free;
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int nfree;
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uchar asid;
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};
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struct Mach
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{
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/* known to assembly */
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int machno; /* physical id of processor */
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uintptr splpc; /* pc of last caller to splhi */
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Proc* proc; /* current process */
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ulong excregs[3];
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ulong cycleshi;
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/* end of known to assembly */
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int flushmmu; /* flush current proc mmu state */
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ulong ticks; /* of the clock since boot time */
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Label sched; /* scheduler wakeup */
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Lock alarmlock; /* access to alarm list */
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void* alarm; /* alarms bound to this clock */
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int inclockintr;
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Proc* readied; /* for runproc */
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ulong schedticks; /* next forced context switch */
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ulong delayloop;
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/* stats */
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int tlbfault;
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int tlbpurge;
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int pfault;
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int cs;
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int syscall;
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int load;
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int intr;
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int lastintr;
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int ilockdepth;
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Perf perf; /* performance counters */
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int cpumhz;
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uvlong cpuhz; /* speed of cpu */
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uvlong cyclefreq; /* Frequency of user readable cycle counter */
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MMMU;
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int stack[1];
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};
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#define NISAOPT 8
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struct ISAConf
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{
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char *type;
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ulong port;
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int irq;
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int nopt;
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char *opt[NISAOPT];
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};
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#define BUSUNKNOWN -1
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struct
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{
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char machs[MAXMACH]; /* active CPUs */
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int exiting; /* shutdown */
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}active;
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extern register Mach* m; /* R10 */
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extern register Proc* up; /* R9 */
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extern int normalprint;
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void nope(void);
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#define NOPE nope();
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/*
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* hardware info about a device
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*/
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typedef struct {
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ulong port;
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int size;
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} Devport;
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struct DevConf
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{
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ulong intnum; /* interrupt number */
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char *type; /* card type, malloced */
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int nports; /* Number of ports */
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Devport *ports; /* The ports themselves */
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};
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#define mpcore ((ulong*)MPCORE_BASE)
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2020-01-10 18:49:33 +00:00
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#define resetmgr ((ulong*)RESETMGR_BASE)
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#define sysmgr ((ulong*)SYSMGR_BASE)
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2020-01-12 03:40:42 +00:00
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/*dmacopy*/
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#define SRC_INC (1<<0)
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#define DST_INC (1<<14)
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